{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T09:45:20Z","timestamp":1725615920839},"reference-count":11,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/ddecs.2006.1649570","type":"proceedings-article","created":{"date-parts":[[2006,7,10]],"date-time":"2006-07-10T16:58:00Z","timestamp":1152550680000},"page":"52-56","source":"Crossref","is-referenced-by-count":4,"title":["ReCoM: A new Reconfigurable Compute Fabric Architecture for Computation-Intensive Applications"],"prefix":"10.1109","author":[{"given":"L.","family":"Sterpone","sequence":"first","affiliation":[]},{"given":"M.","family":"Violante","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"3","article-title":"Garp: A MIPS Processor with a Reconfigurable Co-Processor","author":"hauser","year":"1997","journal-title":"IEEE Symp FPGAs for Custom Computing Machines"},{"key":"2","article-title":"A First Generation DPGA Implementation","author":"tau","year":"1995","journal-title":"Proc Canadian Workshop Field-Programmable Devices FPD 95"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/ICECS.2000.911494"},{"year":"0","key":"1"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/12.859540"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.1998.707876"},{"journal-title":"The RAW prototype design document","year":"2004","author":"taylor","key":"5"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.1996.564808"},{"key":"9","first-page":"391","article-title":"A Medium-Grain Reconfigurable Cell Array for DSP","author":"delgado-frias","year":"2003","journal-title":"Circuit Systems and Signal Proc"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.2000.903407"},{"year":"0","key":"11"}],"event":{"name":"2006 IEEE Design and Diagnostics of Electronic Circuits and systems","location":"Prague, Czech Republic"},"container-title":["2006 IEEE Design and Diagnostics of Electronic Circuits and systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/10974\/34591\/01649570.pdf?arnumber=1649570","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,15]],"date-time":"2017-03-15T20:44:15Z","timestamp":1489610655000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1649570\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/ddecs.2006.1649570","relation":{},"subject":[]}}