{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T15:09:37Z","timestamp":1729609777000,"version":"3.28.0"},"reference-count":22,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2007]]},"DOI":"10.1109\/ddecs.2007.4295299","type":"proceedings-article","created":{"date-parts":[[2008,7,18]],"date-time":"2008-07-18T16:49:29Z","timestamp":1216399769000},"page":"1-6","source":"Crossref","is-referenced-by-count":0,"title":["Improving Tolerance to Power-Supply and Temperature Variations in Synchronous Circuits"],"prefix":"10.1109","author":[{"given":"J.","family":"Semiao","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"J.","family":"Freijedo","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"J. J.","family":"Rodriguez-Andina","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"F.","family":"Vargas","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M. B.","family":"Santos","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"I. C.","family":"Teixeira","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"J. P.","family":"Teixeira","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/VTSA.1997.614925"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.1996.554059"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/IOLTS.2005.25"},{"key":"ref13","doi-asserted-by":"crossref","first-page":"349","DOI":"10.1007\/s10836-005-0972-z","article-title":"Fault Modeling and Simulation of Power Supply Voltage Transients in Digital Systems on a Chip","volume":"21","author":"barros j\u00fanior","year":"2005","journal-title":"Journal of Electronic Testing Theory and Application (JETTA)"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/101.808850"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/33.239876"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.1998.144307"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ICVD.1999.745199"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/43.602470"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/92.736136"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.1998.695033"},{"key":"ref3","first-page":"641","article-title":"Test Generation in VLSI Circuits for Crosstalk Noise","author":"chen","year":"1998","journal-title":"Proc Int l Test Conf (ITC-98)"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/RAMS.1999.744129"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/4.508215"},{"key":"ref8","first-page":"168","article-title":"Estimation of Switching Noise on Power Supply Lines in Deep Sub-Micron CMOS Circuits","author":"zhao","year":"2000","journal-title":"Proc Int Conf on VLSI Design"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/IOLTS.2005.47"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.1999.810665"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1023\/A:1016514129296"},{"key":"ref9","first-page":"169","article-title":"EMI-Induced Soft-Error Rate Estimates for COTS Microprocessor","author":"vargas","year":"2004","journal-title":"Proc 5th IEEE Latin American Test Workshop"},{"key":"ref20","first-page":"14","article-title":"EMC Modeling and Simulation on Chiplevel","author":"steinecke","year":"2001","journal-title":"IEEE Int Symp On Electromagnetic Compatibility (EMC)"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2003.1253179"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1007\/b137864"}],"event":{"name":"2007 IEEE Design and Diagnostics of Electronic Circuits and Systems","start":{"date-parts":[[2007,4,11]]},"location":"Krakow, Poland","end":{"date-parts":[[2007,4,13]]}},"container-title":["2007 IEEE Design and Diagnostics of Electronic Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4295238\/4295239\/04295299.pdf?arnumber=4295299","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,18]],"date-time":"2017-06-18T10:04:54Z","timestamp":1497780294000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4295299\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2007]]},"references-count":22,"URL":"https:\/\/doi.org\/10.1109\/ddecs.2007.4295299","relation":{},"subject":[],"published":{"date-parts":[[2007]]}}}