{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,26]],"date-time":"2025-09-26T13:25:41Z","timestamp":1758893141259},"reference-count":13,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2008,4]]},"DOI":"10.1109\/ddecs.2008.4538786","type":"proceedings-article","created":{"date-parts":[[2008,6,10]],"date-time":"2008-06-10T19:58:11Z","timestamp":1213127891000},"page":"1-6","source":"Crossref","is-referenced-by-count":7,"title":["Code Coverage Analysis using High-Level Decision Diagrams"],"prefix":"10.1109","author":[{"given":"Jaan","family":"Raik","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Uljana","family":"Reinsalu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Raimund","family":"Ubar","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Maksim","family":"Jenihhin","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Peeter","family":"Ellervee","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"13","first-page":"152","article-title":"OCCOM: efficient computation of observability-based code coverage metrics for functional verification","author":"fallah","year":"1998","journal-title":"Proceedings 1998 Design and Automation Conference 35th DAC (Cat No 98CH36175) DAC"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2003.1270851"},{"year":"0","key":"12"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1145\/366246.366248"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/54.936247"},{"journal-title":"International Technology Roadmap for Semiconductors 2006 report [URL]","year":"2007","key":"1"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1145\/337292.337309"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1023\/A:1008335130158"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.1999.761165"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2000.857064"},{"journal-title":"Hardware Design Verification Simulation and Formal Method-Based Approaches","year":"2005","author":"lam","key":"4"},{"key":"9","doi-asserted-by":"crossref","first-page":"413","DOI":"10.1145\/157485.164956","article-title":"high-level transformations for minimizing syntactic variances","author":"chaiyakul","year":"1993","journal-title":"30th ACM\/IEEE Design Automation Conference"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1986.1676819"}],"event":{"name":"2008 11th International Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS)","start":{"date-parts":[[2008,4,16]]},"location":"Bratislava, Slovakia","end":{"date-parts":[[2008,4,18]]}},"container-title":["2008 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4534845\/4538735\/04538786.pdf?arnumber=4538786","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,18]],"date-time":"2017-06-18T08:59:38Z","timestamp":1497776378000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4538786\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008,4]]},"references-count":13,"URL":"https:\/\/doi.org\/10.1109\/ddecs.2008.4538786","relation":{},"subject":[],"published":{"date-parts":[[2008,4]]}}}