{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,29]],"date-time":"2025-09-29T11:59:06Z","timestamp":1759147146754,"version":"3.28.0"},"reference-count":14,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,4]]},"DOI":"10.1109\/ddecs.2010.5491798","type":"proceedings-article","created":{"date-parts":[[2010,7,6]],"date-time":"2010-07-06T14:14:22Z","timestamp":1278425662000},"page":"139-144","source":"Crossref","is-referenced-by-count":22,"title":["A fault-tolerant and congestion-aware routing algorithm for Networks-on-Chip"],"prefix":"10.1109","author":[{"given":"Mojtaba","family":"Valinataj","sequence":"first","affiliation":[]},{"given":"Siamak","family":"Mohammadi","sequence":"additional","affiliation":[]},{"given":"Juha","family":"Plosila","sequence":"additional","affiliation":[]},{"given":"Pasi","family":"Liljeberg","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2006.35"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2008.4542002"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1987.1676939"},{"journal-title":"NIRGAM","year":"2007","key":"ref13"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2004.03.003"},{"key":"ref4","first-page":"849","article-title":"DyXY - A proximity congestion-aware deadlock-free dynamic routing method for Network on Chip","author":"li","year":"2006","journal-title":"Design Automation Conference (DAC)"},{"key":"ref3","first-page":"131","article-title":"Testing strategies for Network on Chip, Networks on Chip","author":"ubar","year":"2003"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/1391469.1391584"},{"key":"ref5","first-page":"203","article-title":"Regional congestion awareness for load balance in Networks-on-Chip","author":"gratz","year":"2008","journal-title":"Int Symp on High-Performance Computer Architecture"},{"key":"ref8","first-page":"841","article-title":"A link failure aware routing algorithm for Networks-on-Chip in nano technologies","author":"valinataj","year":"2009","journal-title":"IEEE Conference on Nanotechnology"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2009.5090627"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/12.620485"},{"key":"ref1","doi-asserted-by":"crossref","first-page":"848","DOI":"10.1109\/12.392844","article-title":"Fault-tolerant wormhole routing algorithms for mesh networks","volume":"44","author":"chalasani","year":"1995","journal-title":"IEEE Trans on Computers"},{"key":"ref9","doi-asserted-by":"crossref","DOI":"10.1109\/IPDPS.2001.925000","article-title":"Adaptive fault-tolerant wormhole routing in 2D meshes","author":"zhou","year":"2001","journal-title":"Proc IEEE Int' i Symp Parallel and Distributed Processing (IPDPS)"}],"event":{"name":"2010 IEEE 13th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)","start":{"date-parts":[[2010,4,14]]},"location":"Vienna","end":{"date-parts":[[2010,4,16]]}},"container-title":["13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5484099\/5491740\/05491798.pdf?arnumber=5491798","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2018,9,7]],"date-time":"2018-09-07T17:37:14Z","timestamp":1536341834000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/5491798\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,4]]},"references-count":14,"URL":"https:\/\/doi.org\/10.1109\/ddecs.2010.5491798","relation":{},"subject":[],"published":{"date-parts":[[2010,4]]}}}