{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T05:20:03Z","timestamp":1725513603058},"reference-count":17,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,4]]},"DOI":"10.1109\/ddecs.2010.5491815","type":"proceedings-article","created":{"date-parts":[[2010,7,6]],"date-time":"2010-07-06T14:14:22Z","timestamp":1278425662000},"page":"72-77","source":"Crossref","is-referenced-by-count":7,"title":["Built-in Clock Domain Crossing (CDC) test and diagnosis in GALS systems"],"prefix":"10.1109","author":[{"given":"C.","family":"Leong","sequence":"first","affiliation":[]},{"given":"P.","family":"Machado","sequence":"additional","affiliation":[]},{"given":"V.","family":"Bexiga","sequence":"additional","affiliation":[]},{"given":"J. P.","family":"Teixeira","sequence":"additional","affiliation":[]},{"given":"I. C.","family":"Teixeira","sequence":"additional","affiliation":[]},{"given":"J. C.","family":"Silva","sequence":"additional","affiliation":[]},{"given":"P.","family":"Lousa","sequence":"additional","affiliation":[]},{"given":"J.","family":"Varela","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1988.207790"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ETSYM.2004.1347572"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2006.881650"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2006.874841"},{"key":"ref14","article-title":"Data Acquisition Electronics for PET Mammography Imaging","author":"leong","year":"2009","journal-title":"Proc Int Conf on Biomedical Electronics and Devices (BIODEVICES)"},{"key":"ref15","article-title":"On Restoring Data Coherence in a GALS System for Medical Imaging","author":"leong","year":"2010","journal-title":"IEEE Latin American Symposium on Circuits and Systems (LASCAS"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2010.5537302"},{"year":"0","key":"ref17"},{"key":"ref4","article-title":"Clock Domain Crossing (CDC) Design & Verification Techniques Using System Verilog","author":"cummings","year":"0","journal-title":"SNUG-2008"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2009.5118079"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/APCCAS.2008.4746218"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1147\/rd.475.0567"},{"article-title":"Essentials of Electronic Testing for Digital Memory and Mixed-Signal VLSI Circuits","year":"2000","author":"bushnell","key":"ref8"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/337292.337597"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2007.151"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2007.164"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/T-C.1974.223950"}],"event":{"name":"2010 IEEE 13th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)","start":{"date-parts":[[2010,4,14]]},"location":"Vienna","end":{"date-parts":[[2010,4,16]]}},"container-title":["13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5484099\/5491740\/05491815.pdf?arnumber=5491815","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2018,9,7]],"date-time":"2018-09-07T17:37:14Z","timestamp":1536341834000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/5491815\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,4]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/ddecs.2010.5491815","relation":{},"subject":[],"published":{"date-parts":[[2010,4]]}}}