{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T01:46:02Z","timestamp":1725414362668},"reference-count":7,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2012,4]]},"DOI":"10.1109\/ddecs.2012.6219038","type":"proceedings-article","created":{"date-parts":[[2012,6,22]],"date-time":"2012-06-22T23:29:31Z","timestamp":1340407771000},"page":"127-132","source":"Crossref","is-referenced-by-count":0,"title":["Efficient link-level error resilience in 3D NoCs"],"prefix":"10.1109","author":[{"given":"Vladimir","family":"Pasca","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Saif-Ur","family":"Rehman","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Lorena","family":"Anghel","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mounir","family":"Benabdenbi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2008.142"},{"key":"2","doi-asserted-by":"crossref","first-page":"562","DOI":"10.1145\/1278480.1278623","article-title":"interconnects in the third dimension: design challenges for 3d ics","author":"bernstein","year":"2007","journal-title":"2007 44th ACM\/IEEE Design Automation Conference DAC"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2006.873612"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/92.863617"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2010.5457198"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2000994"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2005.104"}],"event":{"name":"2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)","start":{"date-parts":[[2012,4,18]]},"location":"Tallinn, Estonia","end":{"date-parts":[[2012,4,20]]}},"container-title":["2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits &amp; Systems (DDECS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6213418\/6219000\/06219038.pdf?arnumber=6219038","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,20]],"date-time":"2017-06-20T20:27:57Z","timestamp":1497990477000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6219038\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,4]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/ddecs.2012.6219038","relation":{},"subject":[],"published":{"date-parts":[[2012,4]]}}}