{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,8]],"date-time":"2024-09-08T08:53:57Z","timestamp":1725785637000},"reference-count":9,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2012,4]]},"DOI":"10.1109\/ddecs.2012.6219056","type":"proceedings-article","created":{"date-parts":[[2012,6,22]],"date-time":"2012-06-22T23:29:31Z","timestamp":1340407771000},"page":"199-200","source":"Crossref","is-referenced-by-count":4,"title":["VHDLVisualizer: HDL model visualization with simulation-based verification"],"prefix":"10.1109","author":[{"given":"Dominik","family":"Macko","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Katarina","family":"Jelemenska","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"journal-title":"Tina Design Suite","article-title":"Analog, digital, symbolic, RF, VHDL, MCU and mixed-mode circuit simulation & PCB design","year":"2011","key":"3"},{"journal-title":"Simtel Products","article-title":"LOGiX-Simulation of logic circuits","year":"2011","key":"2"},{"key":"1","article-title":"HDL model simulation-based verification in a VHDLVisualizer visualization environment","author":"macko","year":"2011","journal-title":"WCIT 2011 Antalya (Turkey"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/VIUF.2000.890270"},{"key":"6","article-title":"VHDL model visualization","author":"petra?s?","year":"2008","journal-title":"Master Theses FIIT STU Bratislava (Slovakia"},{"key":"5","article-title":"ANTLR 3","author":"volkmann","year":"2011","journal-title":"Online"},{"journal-title":"\"ModelSim\" Mentor Graphics's Products","year":"2011","key":"4"},{"key":"9","article-title":"GHDL-Where VHDL meets gcc","author":"gingold","year":"2011","journal-title":"Online"},{"key":"8","first-page":"121","article-title":"Process visualization system design based on co-design methodology","author":"cso?ka?s","year":"2007","journal-title":"ICETA 2007 Slovak Republic Kos?ice Elfa"}],"event":{"name":"2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)","start":{"date-parts":[[2012,4,18]]},"location":"Tallinn, Estonia","end":{"date-parts":[[2012,4,20]]}},"container-title":["2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6213418\/6219000\/06219056.pdf?arnumber=6219056","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T15:14:12Z","timestamp":1490109252000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6219056\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,4]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1109\/ddecs.2012.6219056","relation":{},"subject":[],"published":{"date-parts":[[2012,4]]}}}