{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T16:31:21Z","timestamp":1725553881588},"reference-count":8,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,4]]},"DOI":"10.1109\/ddecs.2014.6868762","type":"proceedings-article","created":{"date-parts":[[2014,8,8]],"date-time":"2014-08-08T14:34:40Z","timestamp":1407508480000},"page":"51-54","source":"Crossref","is-referenced-by-count":0,"title":["A 64-MHz∼640-MHz 64-phase clock generator"],"prefix":"10.1109","author":[{"given":"Hong-Yi","family":"Huang","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jen-Chieh","family":"Liu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Shi-Jia","family":"Sun","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Cheng-Hao","family":"Fu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kuo-Hsing","family":"Cheng","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.857373"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.910966"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.888297"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.917567"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2006.1696306"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.864122"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.874273"},{"key":"ref1","first-page":"4867","article-title":"A 1.7mW all digital phase-locked loop with new gain generator and low power DCO","author":"chao","year":"2006","journal-title":"Proc IEEE Int Symp Circuit and Systems"}],"event":{"name":"2014 IEEE 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)","start":{"date-parts":[[2014,4,23]]},"location":"Warsaw, Poland","end":{"date-parts":[[2014,4,25]]}},"container-title":["17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6862738\/6868744\/06868762.pdf?arnumber=6868762","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,23]],"date-time":"2017-03-23T17:28:52Z","timestamp":1490290132000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6868762\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,4]]},"references-count":8,"URL":"https:\/\/doi.org\/10.1109\/ddecs.2014.6868762","relation":{},"subject":[],"published":{"date-parts":[[2014,4]]}}}