{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T05:01:45Z","timestamp":1725426105755},"reference-count":9,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,4]]},"DOI":"10.1109\/ddecs.2016.7482444","type":"proceedings-article","created":{"date-parts":[[2016,6,2]],"date-time":"2016-06-02T17:06:31Z","timestamp":1464887191000},"page":"1-6","source":"Crossref","is-referenced-by-count":4,"title":["Co-design of CML IO and Interposer channel for low area and power signaling"],"prefix":"10.1109","author":[{"given":"Muhammad Waqas","family":"Chaudhary","sequence":"first","affiliation":[{"name":"Fraunhofer Institute for Integrated Circuits IIS, Design Automation Division EAS, 01069 Dresden, Germany"}]},{"given":"Andy","family":"Heinig","sequence":"additional","affiliation":[{"name":"Fraunhofer Institute for Integrated Circuits IIS, Design Automation Division EAS, 01069 Dresden, Germany"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISEMC.2013.6670429"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC.2015.7159673"},{"key":"ref6","first-page":"314d","article-title":"All-Copper Chip-to-Substrate Interconnects Part II. Modeling and Design J. Electrochem. Soc","author":"ate","year":"2008"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/3DIC.2015.7334466"},{"year":"0","key":"ref8","article-title":"JEP155A.01 JOINT JEDEC\/ESDA standard Recommended ESD Target Levels for HBM\/MM Qualification"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2003.1205938"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC.2015.7159603"},{"year":"0","key":"ref9"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/3DIC.2013.6702326"}],"event":{"name":"2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)","start":{"date-parts":[[2016,4,20]]},"location":"Kosice, Slovakia","end":{"date-parts":[[2016,4,22]]}},"container-title":["2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7480193\/7482431\/07482444.pdf?arnumber=7482444","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,6,8]],"date-time":"2021-06-08T04:09:08Z","timestamp":1623125348000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/7482444\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,4]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1109\/ddecs.2016.7482444","relation":{},"subject":[],"published":{"date-parts":[[2016,4]]}}}