{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,3]],"date-time":"2024-09-03T21:44:10Z","timestamp":1725399850383},"reference-count":13,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,4]]},"DOI":"10.1109\/ddecs.2016.7482448","type":"proceedings-article","created":{"date-parts":[[2016,6,2]],"date-time":"2016-06-02T13:06:31Z","timestamp":1464872791000},"page":"1-6","source":"Crossref","is-referenced-by-count":1,"title":["Built-in self-repair architecture generator for digital cores"],"prefix":"10.1109","author":[{"given":"Stefan","family":"Kristofik","sequence":"first","affiliation":[]},{"given":"Marcel","family":"Balaz","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","first-page":"10","article-title":"Effective logic self repair based on extracted logic clusters","author":"gleichner","year":"2010","journal-title":"14th IEEE Conf Signal Processing Algorithms Architectures Arrangements and Applications SPA 2010"},{"doi-asserted-by":"publisher","key":"ref11","DOI":"10.1109\/DSD.2012.29"},{"doi-asserted-by":"publisher","key":"ref12","DOI":"10.1109\/DDECS.2014.6868780"},{"year":"0","author":"amaru","article-title":"The epfl combinational benchmark suite","key":"ref13"},{"doi-asserted-by":"publisher","key":"ref4","DOI":"10.1109\/DSD.2009.238"},{"key":"ref3","first-page":"13","article-title":"A comprehensive scheme for logic self repair","author":"koal","year":"2009","journal-title":"Conf Signal Processing Algorithms Architectures Arrangements and Applications SPA 2009"},{"doi-asserted-by":"publisher","key":"ref6","DOI":"10.1109\/DDECS.2014.6868761"},{"doi-asserted-by":"publisher","key":"ref5","DOI":"10.1109\/DSD.2015.118"},{"doi-asserted-by":"publisher","key":"ref8","DOI":"10.1109\/DDECS.2010.5491821"},{"doi-asserted-by":"publisher","key":"ref7","DOI":"10.4018\/978-1-60960-212-3.ch010"},{"doi-asserted-by":"publisher","key":"ref2","DOI":"10.1109\/RAMS.2015.7105068"},{"doi-asserted-by":"publisher","key":"ref1","DOI":"10.1109\/MDT.2005.97"},{"doi-asserted-by":"publisher","key":"ref9","DOI":"10.1109\/DDECS.2014.6868818"}],"event":{"name":"2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)","start":{"date-parts":[[2016,4,20]]},"location":"Kosice, Slovakia","end":{"date-parts":[[2016,4,22]]}},"container-title":["2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits &amp; Systems (DDECS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7480193\/7482431\/07482448.pdf?arnumber=7482448","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2016,9,29]],"date-time":"2016-09-29T20:23:31Z","timestamp":1475180611000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7482448\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,4]]},"references-count":13,"URL":"https:\/\/doi.org\/10.1109\/ddecs.2016.7482448","relation":{},"subject":[],"published":{"date-parts":[[2016,4]]}}}