{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T14:19:56Z","timestamp":1725545996037},"reference-count":15,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,4]]},"DOI":"10.1109\/ddecs.2016.7482458","type":"proceedings-article","created":{"date-parts":[[2016,6,2]],"date-time":"2016-06-02T13:06:31Z","timestamp":1464872791000},"page":"1-6","source":"Crossref","is-referenced-by-count":0,"title":["FPGA-controlled PCBA power-on self-test using processor's debug features"],"prefix":"10.1109","author":[{"given":"B.","family":"Du","sequence":"first","affiliation":[]},{"given":"E.","family":"Sanchez","sequence":"additional","affiliation":[]},{"given":"M. Sonza","family":"Reorda","sequence":"additional","affiliation":[]},{"given":"J. Perez","family":"Acle","sequence":"additional","affiliation":[]},{"given":"A.","family":"Tsertov","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2010.5"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/DDECS.2015.56"},{"key":"ref12","first-page":"1","article-title":"Filling a Gap in Board-Level At-Speed Test Coverage","author":"jutman","year":"2015","journal-title":"IEEE International Workshop on Defects Adaptive Test and Data Analysis (DATA)"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2010.78"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2012.6401571"},{"journal-title":"ARM","article-title":"CoreSight Program Flow Trace (PFTv1.0 and PFTv1.1) Architecture Specification","year":"0","key":"ref15"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ETS.2012.6233044"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2014.62"},{"journal-title":"miniMIPS Website","year":"0","key":"ref6"},{"key":"ref5","article-title":"Observability solutions for in-field functional test of processor-based systems","author":"perez acle","year":"2015","journal-title":"Proc of the 30th IEEE Conference on Design of Circuits and Integrated Systems (DCIS)"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2015.0271"},{"year":"0","key":"ref7"},{"key":"ref2","first-page":"1","article-title":"An effective approach to automatic functional processor test generation for small-delay faults","author":"riefert","year":"2014","journal-title":"Proc IEEE Design Automation and Test in Europe (DATE"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2010.5699266"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2015.7116284"}],"event":{"name":"2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)","start":{"date-parts":[[2016,4,20]]},"location":"Kosice","end":{"date-parts":[[2016,4,22]]}},"container-title":["2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits &amp; Systems (DDECS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7480193\/7482431\/07482458.pdf?arnumber=7482458","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2016,9,29]],"date-time":"2016-09-29T20:23:45Z","timestamp":1475180625000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7482458\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,4]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/ddecs.2016.7482458","relation":{},"subject":[],"published":{"date-parts":[[2016,4]]}}}