{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,5]],"date-time":"2026-02-05T23:59:46Z","timestamp":1770335986710,"version":"3.49.0"},"reference-count":9,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,4]]},"DOI":"10.1109\/ddecs.2016.7482474","type":"proceedings-article","created":{"date-parts":[[2016,6,2]],"date-time":"2016-06-02T13:06:31Z","timestamp":1464872791000},"page":"1-4","source":"Crossref","is-referenced-by-count":5,"title":["A new user-friendly ATPG platform for digital circuits"],"prefix":"10.1109","author":[{"given":"M.","family":"Lipovsky","sequence":"first","affiliation":[]},{"given":"J.","family":"Svarc","sequence":"additional","affiliation":[]},{"given":"E.","family":"Gramatova","sequence":"additional","affiliation":[]},{"given":"P.","family":"Fiser","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","first-page":"663","article-title":"A Neutral Netlist of 10 Combinational Benchmark Circuits and Target Translator in Fortran","author":"brglez","year":"1985","journal-title":"Proc of the International Symposium on Circuits and Systems"},{"key":"ref3","first-page":"18","article-title":"HOPE","volume":"15","author":"lee","year":"1996","journal-title":"An Efficient Parallel Fault Simulator for Synchronous Sequential Circuits IEEE Transaction on Computer=Aided Design of Integrated Circuits and Systems"},{"key":"ref6","year":"1991","journal-title":"User's Guide for ATALANTA Virginia Polytechnic & State University"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.1989.100747"},{"key":"ref8","article-title":"On the Acceleration of Test Generation Algorithms, Computers","volume":"c 32","author":"fujiwara","year":"2014","journal-title":"IEEE Transactions"},{"key":"ref7","year":"1991","journal-title":"User's guide for HOPE s l Virginia Polytechnic & State University"},{"key":"ref2","first-page":"946","article-title":"An efficient forward fault simulation algorithm based on the parallel pattern single fault propagation","author":"lee","year":"1991","journal-title":"Proc of International Test Conference"},{"key":"ref9","article-title":"Handbook of Testing Electronic Systems. Praha","volume":"395","author":"nov\u00e1k","year":"2005","journal-title":"?eské vysoké u?eni technické v Praze"},{"key":"ref1","article-title":"Atalanta","volume":"93 12","author":"lee","year":"1991","journal-title":"An efficient forward fault simulation ATPG for combinational circuits Technical Report"}],"event":{"name":"2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)","location":"Kosice","start":{"date-parts":[[2016,4,20]]},"end":{"date-parts":[[2016,4,22]]}},"container-title":["2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7480193\/7482431\/07482474.pdf?arnumber=7482474","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2016,9,29]],"date-time":"2016-09-29T20:23:59Z","timestamp":1475180639000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7482474\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,4]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1109\/ddecs.2016.7482474","relation":{},"subject":[],"published":{"date-parts":[[2016,4]]}}}