{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,2]],"date-time":"2025-11-02T05:44:46Z","timestamp":1762062286678},"reference-count":16,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017,4]]},"DOI":"10.1109\/ddecs.2017.7934559","type":"proceedings-article","created":{"date-parts":[[2017,5,29]],"date-time":"2017-05-29T16:22:11Z","timestamp":1496074931000},"page":"158-163","source":"Crossref","is-referenced-by-count":4,"title":["On the robustness of memristor based logic gates"],"prefix":"10.1109","author":[{"given":"Lei","family":"Xie","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hoang Anh","family":"Du Nguyen","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jintao","family":"Yu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mottaqiallah","family":"Taouil","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Said","family":"Hamdioui","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1002\/adma.200900375"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1007\/978-94-007-4491-2_12"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2014.2332261"},{"key":"ref13","article-title":"Spice model of memristor with nonlinear dopant drift","author":"biolek","year":"2009","journal-title":"Radioengineering"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1088\/0957-4484\/18\/3\/035204"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1002\/adma.201103379"},{"journal-title":"Synopsys HSPICE User Guide","year":"0","key":"ref16"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2013.2273837"},{"key":"ref3","first-page":"1718","article-title":"Memristor based computation-in-memory architecture for data-intensive applications","author":"hamdioui","year":"2015","journal-title":"DATE"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2013.2282132"},{"journal-title":"Boolean logic gate exploration for memristor crossbar ” in DTIS","year":"2016","author":"xie","key":"ref5"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2015.7357122"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2012.2210856"},{"journal-title":"Memristor for computing Myth or reality?” in DATE","year":"2017","author":"hamdioui","key":"ref2"},{"journal-title":"ITRS","article-title":"Beyond cmos white paper","year":"2014","key":"ref1"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1007\/s00339-004-3149-1"}],"event":{"name":"2017 IEEE 20th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)","start":{"date-parts":[[2017,4,19]]},"location":"Dresden","end":{"date-parts":[[2017,4,21]]}},"container-title":["2017 IEEE 20th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7932334\/7934552\/07934559.pdf?arnumber=7934559","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,4,17]],"date-time":"2020-04-17T03:19:06Z","timestamp":1587093546000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/7934559\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,4]]},"references-count":16,"URL":"https:\/\/doi.org\/10.1109\/ddecs.2017.7934559","relation":{},"subject":[],"published":{"date-parts":[[2017,4]]}}}