{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,29]],"date-time":"2024-10-29T14:58:18Z","timestamp":1730213898692,"version":"3.28.0"},"reference-count":11,"publisher":"IEEE","license":[{"start":{"date-parts":[[2019,4,1]],"date-time":"2019-04-01T00:00:00Z","timestamp":1554076800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,4,1]],"date-time":"2019-04-01T00:00:00Z","timestamp":1554076800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,4,1]],"date-time":"2019-04-01T00:00:00Z","timestamp":1554076800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,4]]},"DOI":"10.1109\/ddecs.2019.8724641","type":"proceedings-article","created":{"date-parts":[[2019,5,30]],"date-time":"2019-05-30T22:52:12Z","timestamp":1559256732000},"page":"1-4","source":"Crossref","is-referenced-by-count":5,"title":["Efficient Error Recovery Scheme in Fault-tolerant NoC Architectures"],"prefix":"10.1109","author":[{"given":"Martin","family":"Strava","sequence":"first","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2005.104"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/IOLTS.2006.44"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2008.106"},{"key":"ref6","article-title":"Joint consideration of fault-tolerance, energy-efficiency and performance in onchip networks","author":"ejlali","year":"2007","journal-title":"Proc of Design Automation and Test in Europe"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2017.2775643"},{"key":"ref5","first-page":"102","article-title":"Low power error-resilient encoding for onchip data buses","author":"bertozzi","year":"2000","journal-title":"Proc of the Design Automation and Test Conference in Europe"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1016\/j.compeleceng.2016.02.013"},{"key":"ref7","first-page":"33","article-title":"Fault tolerance in network-on-chip by using single error correction and double error detection","volume":"5","author":"sannakki","year":"2015","journal-title":"IOSR Journal of VLSI and Signal Processing"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2005.108"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ICM.2005.1590063"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/2.976921"}],"event":{"name":"2019 IEEE 22nd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)","start":{"date-parts":[[2019,4,24]]},"location":"Cluj-Napoca, Romania","end":{"date-parts":[[2019,4,26]]}},"container-title":["2019 IEEE 22nd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8718445\/8724630\/08724641.pdf?arnumber=8724641","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,19]],"date-time":"2022-07-19T20:21:45Z","timestamp":1658262105000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8724641\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,4]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/ddecs.2019.8724641","relation":{},"subject":[],"published":{"date-parts":[[2019,4]]}}}