{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,7,1]],"date-time":"2025-07-01T14:05:49Z","timestamp":1751378749088,"version":"3.28.0"},"reference-count":13,"publisher":"IEEE","license":[{"start":{"date-parts":[[2021,4,7]],"date-time":"2021-04-07T00:00:00Z","timestamp":1617753600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2021,4,7]],"date-time":"2021-04-07T00:00:00Z","timestamp":1617753600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2021,4,7]],"date-time":"2021-04-07T00:00:00Z","timestamp":1617753600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021,4,7]]},"DOI":"10.1109\/ddecs52668.2021.9417050","type":"proceedings-article","created":{"date-parts":[[2021,4,30]],"date-time":"2021-04-30T20:25:43Z","timestamp":1619814343000},"page":"33-36","source":"Crossref","is-referenced-by-count":2,"title":["Q-Learning-based Routing Algorithm for 3D Network-on-Chips"],"prefix":"10.1109","author":[{"given":"Nurettin","family":"BOLUCU","sequence":"first","affiliation":[]},{"given":"Suleyman","family":"TOSUN","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","article-title":"Maximally fully adaptive routing in 2d meshes","volume":"i","author":"glass","year":"1992","journal-title":"Proceedings of the International Conference on Parallel Processing"},{"key":"ref11","first-page":"849","article-title":"Dyxy: a proximity congestion-aware deadlock-free dynamic routing method for network on chip","author":"li","year":"2006","journal-title":"Proc 43rd Annu Conf Design Automation"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/VLSISoC.2011.6081616"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4614-4274-5"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/378239.379048"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP.2015.7245728"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/NOCS.2012.10"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2011.239"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/SAMOS.2012.6404180"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/NESEA.2011.6144949"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2008.38"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MCSoC.2012.24"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/NESEA.2012.6474016"}],"event":{"name":"2021 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)","start":{"date-parts":[[2021,4,7]]},"location":"Vienna, Austria","end":{"date-parts":[[2021,4,9]]}},"container-title":["2021 24th International Symposium on Design and Diagnostics of Electronic Circuits &amp; Systems (DDECS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9417028\/9417018\/09417050.pdf?arnumber=9417050","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,5,10]],"date-time":"2022-05-10T15:41:13Z","timestamp":1652197273000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9417050\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,4,7]]},"references-count":13,"URL":"https:\/\/doi.org\/10.1109\/ddecs52668.2021.9417050","relation":{},"subject":[],"published":{"date-parts":[[2021,4,7]]}}}