{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,3]],"date-time":"2026-06-03T00:09:41Z","timestamp":1780445381551,"version":"3.54.1"},"reference-count":22,"publisher":"IEEE","license":[{"start":{"date-parts":[[2022,4,6]],"date-time":"2022-04-06T00:00:00Z","timestamp":1649203200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,4,6]],"date-time":"2022-04-06T00:00:00Z","timestamp":1649203200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100008530","name":"European Regional Development Fund","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100008530","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100009950","name":"Ministry of Education","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100009950","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2022,4,6]]},"DOI":"10.1109\/ddecs54261.2022.9770169","type":"proceedings-article","created":{"date-parts":[[2022,5,9]],"date-time":"2022-05-09T20:06:40Z","timestamp":1652126800000},"page":"142-147","source":"Crossref","is-referenced-by-count":11,"title":["Exploring Software Models for the Resilience Analysis of Deep Learning Accelerators: the NVDLA Case Study"],"prefix":"10.1109","author":[{"given":"A.","family":"Veronesi","sequence":"first","affiliation":[{"name":"IHP - Leibniz Institut f&#x00FC;r Innovative Mikroelektronik,Frankfurt (Oder),Germany"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"F.","family":"Dall'Occo","sequence":"additional","affiliation":[{"name":"Universit&#x00E0; degli Studi di Ferrara,Ferrara,Italy"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"D.","family":"Bertozzi","sequence":"additional","affiliation":[{"name":"Universit&#x00E0; degli Studi di Ferrara,Ferrara,Italy"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"M.","family":"Favalli","sequence":"additional","affiliation":[{"name":"Universit&#x00E0; degli Studi di Ferrara,Ferrara,Italy"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"M.","family":"Krstic","sequence":"additional","affiliation":[{"name":"IHP - Leibniz Institut f&#x00FC;r Innovative Mikroelektronik,Frankfurt (Oder),Germany"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","article-title":"NVDLA open source project","year":"0"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2020.3048829"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/DFT52944.2021.9568307"},{"key":"ref13","article-title":"NVIDIA Jetson modules","year":"0"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI-DAT.2019.8741855"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/EMC249363.2019.00012"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ITC44170.2019.9000149"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI-DAT52063.2021.9427328"},{"key":"ref18","article-title":"Cross-layer hardware\/software assessment of the open-source nvdla configurable deep learning accelerator","author":"veronesi","year":"2020","journal-title":"IFIP\/IEEE 28th International Conference on Very Large Scale Integration (VLSI-SOC)"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2012.2223827"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO50266.2020.00033"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2018.8368656"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2018.8465834"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/3126908.3126964"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2019.00034"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2019.00025"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/HPEC43674.2020.9286149"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1016\/j.eng.2020.01.007"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001165"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2012.6241814"},{"key":"ref22","article-title":"A survey of quantization methods for efficient neural network inference","author":"gholami","year":"2021"},{"key":"ref21","author":"lecun","year":"1989","journal-title":"Generalization and network design strategies"}],"event":{"name":"2022 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)","location":"Prague, Czech Republic","start":{"date-parts":[[2022,4,6]]},"end":{"date-parts":[[2022,4,8]]}},"container-title":["2022 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9770102\/9770107\/09770169.pdf?arnumber=9770169","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,6,20]],"date-time":"2022-06-20T21:31:57Z","timestamp":1655760717000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9770169\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,4,6]]},"references-count":22,"URL":"https:\/\/doi.org\/10.1109\/ddecs54261.2022.9770169","relation":{},"subject":[],"published":{"date-parts":[[2022,4,6]]}}}