{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,20]],"date-time":"2026-05-20T05:11:03Z","timestamp":1779253863009,"version":"3.51.4"},"reference-count":24,"publisher":"IEEE","license":[{"start":{"date-parts":[[2026,4,27]],"date-time":"2026-04-27T00:00:00Z","timestamp":1777248000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,4,27]],"date-time":"2026-04-27T00:00:00Z","timestamp":1777248000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2026,4,27]]},"DOI":"10.1109\/ddecs69233.2026.11521000","type":"proceedings-article","created":{"date-parts":[[2026,5,19]],"date-time":"2026-05-19T19:47:47Z","timestamp":1779220067000},"page":"1-6","source":"Crossref","is-referenced-by-count":0,"title":["Assessing the Vulnerability of Open-Source RISC-V Processors to Transient Execution Attacks"],"prefix":"10.1109","author":[{"given":"Elia","family":"Lazzeri","sequence":"first","affiliation":[{"name":"Politecnico di Milano Milano,Italy"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Gianluca","family":"Furano","sequence":"additional","affiliation":[{"name":"European Space Agency,Noordwijk,The Netherlands"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Luca","family":"Cassano","sequence":"additional","affiliation":[{"name":"Politecnico di Milano Milano,Italy"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/3442479"},{"key":"ref2","article-title":"Meltdown: Reading kernel memory from user space","volume-title":"27th USENIX Security Symposium (USENIX Security 18)","author":"Lipp","year":"2018"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/3399742"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/IOLTS59296.2023.10224862"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-32824-9_14"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/DFT56152.2022.9962352"},{"key":"ref7","author":"Graf","year":"2026","journal-title":"VMScape: Exposing and Exploiting Incomplete Branch Predictor Isolation in Cloud Environments"},{"key":"ref8","article-title":"The berkeley out-of-order machine (boom): An industry-competitive, synthesizable, parameterized risc-v processor","author":"Celio","year":"2015","journal-title":"EECS Department, University of California, Berkeley, Tech. Rep. UCB\/EECS-2015-167"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/DSN-W50199.2020.00020"},{"key":"ref10","volume-title":"Cva6 github repository","author":"Group","year":"2024"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/DDECS63720.2025.11006772"},{"key":"ref12","article-title":"Developing a test suite for transient-execution attacks on risc-v and cheri-risc-v","author":"Fuchs","year":"2021","journal-title":"Workshop on Computer Architecture Research with RISCV"},{"key":"ref13","author":"Fuchs","year":"2021","journal-title":"Analysis of transient-execution attacks on the out-of-order cheri-risc-v microprocessor toooba"},{"key":"ref14","article-title":"Replicating and mitigating spectre attacks on an open source risc-v microarchitecture","author":"Gonzalez","year":"2019","journal-title":"Workshop on Computer Architecture Research with RISC-V (CARRV)"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/SP46215.2023.10179399"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2021.3134256"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1016\/j.compeleceng.2022.108546"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/DFT63277.2024.10753540"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/3604906"},{"key":"ref20","author":"Zhao","year":"2020","journal-title":"Sonicboom: The 3rd generation berkeley out-of-order machine"},{"key":"ref21","first-page":"3825","article-title":"\\{RETBLEED\\}: Arbitrary speculative code execution with return instructions","volume-title":"31st USENIX Security Symposium (USENIX Security 22)","author":"Wikner","year":"2022"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/3585519"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/3645109"},{"key":"ref24","volume-title":"PIC64GX 64-bit MPUs","year":"2025"}],"event":{"name":"2026 IEEE 29th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)","location":"Bratislava, Slovakia","start":{"date-parts":[[2026,4,27]]},"end":{"date-parts":[[2026,4,29]]}},"container-title":["2026 IEEE 29th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11520920\/11520973\/11521000.pdf?arnumber=11521000","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,5,20]],"date-time":"2026-05-20T05:01:12Z","timestamp":1779253272000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11521000\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,4,27]]},"references-count":24,"URL":"https:\/\/doi.org\/10.1109\/ddecs69233.2026.11521000","relation":{},"subject":[],"published":{"date-parts":[[2026,4,27]]}}}