{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,9]],"date-time":"2026-02-09T17:02:13Z","timestamp":1770656533949,"version":"3.49.0"},"reference-count":6,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2012,10]]},"DOI":"10.1109\/dft.2012.6378199","type":"proceedings-article","created":{"date-parts":[[2012,12,18]],"date-time":"2012-12-18T16:51:04Z","timestamp":1355849464000},"page":"55-58","source":"Crossref","is-referenced-by-count":36,"title":["Software exploitable hardware Trojans in embedded processor"],"prefix":"10.1109","author":[{"given":"Xinmu","family":"Wang","sequence":"first","affiliation":[]},{"given":"Tatini","family":"Mal-Sarkar","sequence":"additional","affiliation":[]},{"given":"Aswin","family":"Krishna","sequence":"additional","affiliation":[]},{"given":"Seetharam","family":"Narasimhan","sequence":"additional","affiliation":[]},{"given":"Swarup","family":"Bhunia","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2011.6081413"},{"key":"2","first-page":"86","article-title":"The RC5 Encryption Algorithm","author":"rivest","year":"0","journal-title":"FSE 1994e"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/HLDVT.2009.5340158"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2010.299"},{"key":"5","author":"tyson","year":"2012","journal-title":"China-made US Military Chip Has Security Backdoor"},{"key":"4","article-title":"Designing and implementing malicious hardware","author":"king","year":"0","journal-title":"USENIX Workshop on LEET April 2008"}],"event":{"name":"2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)","location":"Austin, TX, USA","start":{"date-parts":[[2012,10,3]]},"end":{"date-parts":[[2012,10,5]]}},"container-title":["2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6362314\/6378188\/06378199.pdf?arnumber=6378199","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T22:37:40Z","timestamp":1490135860000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6378199\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,10]]},"references-count":6,"URL":"https:\/\/doi.org\/10.1109\/dft.2012.6378199","relation":{},"subject":[],"published":{"date-parts":[[2012,10]]}}}