{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,30]],"date-time":"2026-01-30T12:57:27Z","timestamp":1769777847896,"version":"3.49.0"},"reference-count":34,"publisher":"IEEE","license":[{"start":{"date-parts":[[2014,10,1]],"date-time":"2014-10-01T00:00:00Z","timestamp":1412121600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2014,10,1]],"date-time":"2014-10-01T00:00:00Z","timestamp":1412121600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,10]]},"DOI":"10.1109\/dft.2014.6962081","type":"proceedings-article","created":{"date-parts":[[2014,12,1]],"date-time":"2014-12-01T18:16:22Z","timestamp":1417457782000},"page":"287-292","source":"Crossref","is-referenced-by-count":2,"title":["An instance-based SER analysis in the presence of PVTA variations"],"prefix":"10.1109","author":[{"given":"Bahareh","family":"Farahani","sequence":"first","affiliation":[{"name":"School of Electrical and Computer Engineering University of Tehran, Tehran 14395-1515, Iran"}]},{"given":"Saeed","family":"Safari","sequence":"additional","affiliation":[{"name":"School of Electrical and Computer Engineering University of Tehran, Tehran 14395-1515, Iran"}]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"publisher","DOI":"10.1109\/12.544481"},{"key":"17","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2009.4810329"},{"key":"18","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2005.1465256"},{"key":"33","author":"kleinosowski","year":"0","journal-title":"The seasoning tool A spice engine for adding soft-errors on netlists"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996804"},{"key":"34","year":"0","journal-title":"NANGATE"},{"key":"16","first-page":"755","article-title":"Faser: Fast analysis of soft error susceptibility for cell-based designs","author":"zhang","year":"2006","journal-title":"ISQED IEEE Computer Society"},{"key":"13","first-page":"1117","article-title":"Impact of process variation on soft error vulnerability for nanometer vlsi circuits","volume":"2","author":"ding","year":"2005","journal-title":"ASICON"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2006.229323"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2007.364663"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/DFT.2011.45"},{"key":"21","doi-asserted-by":"publisher","DOI":"10.1109\/23.124140"},{"key":"20","doi-asserted-by":"publisher","DOI":"10.1109\/FTCS.1995.466977"},{"key":"22","doi-asserted-by":"publisher","DOI":"10.1109\/OLT.2003.1214376"},{"key":"23","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2002.1028924"},{"key":"24","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2005.862738"},{"key":"25","doi-asserted-by":"publisher","DOI":"10.1145\/1146909.1147172"},{"key":"26","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2006.320885"},{"key":"27","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2011.5784544"},{"key":"28","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2008.4771785"},{"key":"29","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2007.891036"},{"key":"3","first-page":"123","article-title":"Efficient flip-flop designs for set\/seu mitigation with tolerance to crosstalk induced signal delays","volume":"3","author":"jagirdar","year":"2007","journal-title":"SELSE"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2011.5784522"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1142\/S0218126612400270"},{"key":"1","year":"0","journal-title":"International Technology Roadmap for Semiconductors (ITRS"},{"key":"30","doi-asserted-by":"publisher","DOI":"10.1109\/23.903813"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2013.6548935"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2006.143"},{"key":"32","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.1982.4336490"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/ISED.2013.19"},{"key":"31","doi-asserted-by":"crossref","DOI":"10.1007\/978-1-4419-6993-4","author":"nicolaidis","year":"2011","journal-title":"Soft Errors in Modern Electronic Systems"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/TDSC.2009.29"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2013.342"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2013.6531971"}],"event":{"name":"2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)","location":"Amsterdam, Netherlands","start":{"date-parts":[[2014,10,1]]},"end":{"date-parts":[[2014,10,3]]}},"container-title":["2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6942523\/6962057\/06962081.pdf?arnumber=6962081","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,1,29]],"date-time":"2026-01-29T21:20:27Z","timestamp":1769721627000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/6962081\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,10]]},"references-count":34,"URL":"https:\/\/doi.org\/10.1109\/dft.2014.6962081","relation":{},"subject":[],"published":{"date-parts":[[2014,10]]}}}