{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,29]],"date-time":"2024-10-29T15:09:04Z","timestamp":1730214544898,"version":"3.28.0"},"reference-count":19,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,10]]},"DOI":"10.1109\/dft.2015.7315142","type":"proceedings-article","created":{"date-parts":[[2015,11,9]],"date-time":"2015-11-09T22:49:30Z","timestamp":1447109370000},"page":"91-96","source":"Crossref","is-referenced-by-count":2,"title":["Using value similarity of registers for soft error mitigation"],"prefix":"10.1109","author":[{"given":"Abdulaziz","family":"Eker","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Oguz","family":"Ergin","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/40.782565"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2167809"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/2024724.2024954"},{"key":"ref13","article-title":"QEMU, a Fast and Portable Dynamic Translator","author":"bellard","year":"0","journal-title":"Proc ATEC'05 2005"},{"year":"2006","key":"ref14","article-title":"Standard Performance Evaluation Corporation, SPEC Benchmarks"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2011.6081435"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2009.4798242"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2011.5784522"},{"key":"ref18","first-page":"155","article-title":"Gate sizing to radiation harden combinational logic","volume":"25","author":"zhou","year":"2006","journal-title":"IEEE TCAD"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2008.917591"},{"key":"ref4","article-title":"Addressing soft errors in ARM core-based SoC","author":"phelan","year":"0","journal-title":"ARM White Paper 2003"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2005.119"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1147\/rd.62.0200"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.859884"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2005.98"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/L-CA.2006.12"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2003.1253674"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2005.104"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2005.181"}],"event":{"name":"2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS)","start":{"date-parts":[[2015,10,12]]},"location":"Amherst, MA, USA","end":{"date-parts":[[2015,10,14]]}},"container-title":["2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7304347\/7315124\/07315142.pdf?arnumber=7315142","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,25]],"date-time":"2017-03-25T01:56:48Z","timestamp":1490407008000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7315142\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,10]]},"references-count":19,"URL":"https:\/\/doi.org\/10.1109\/dft.2015.7315142","relation":{},"subject":[],"published":{"date-parts":[[2015,10]]}}}