{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,8]],"date-time":"2024-09-08T06:35:01Z","timestamp":1725777301065},"reference-count":27,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,10]]},"DOI":"10.1109\/dft.2018.8602850","type":"proceedings-article","created":{"date-parts":[[2019,1,9]],"date-time":"2019-01-09T01:46:18Z","timestamp":1546998378000},"page":"1-6","source":"Crossref","is-referenced-by-count":4,"title":["Performance-Based and Aging-Aware Resource Allocation for Concurrent GPU Applications"],"prefix":"10.1109","author":[{"given":"Zois-Gerasimos","family":"Tasoulas","sequence":"first","affiliation":[]},{"given":"Ryan","family":"Guss","sequence":"additional","affiliation":[]},{"given":"Iraklis","family":"Anagnostopoulos","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","first-page":"399","article-title":"NBTI tolerant microarchitecture design in the presence of process variation","author":"fu","year":"2008","journal-title":"Proceedings of the 41st Annual IEEE\/ACM International Symposium on Microarchitecture"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/1964179.1964184"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/1816038.1815992"},{"key":"ref13","first-page":"850","article-title":"A QoS-aware memory controller for dynamically balancing GPU and CPU bandwidth use in an MPSoC","author":"min kyu jeong","year":"2012","journal-title":"DAC Design Automation Conference 2012 DAC"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2015.2477405"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2012.6263957"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2006.320885"},{"key":"ref17","article-title":"Aging benefits in nanometer cmos designs","author":"rossi","year":"2016","journal-title":"IEEE Transactions on Circuits and Systems II Express Briefs"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TMSCS.2016.2627541"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/2593069.2593208"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/2818950.2818979"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2012.16"},{"key":"ref3","first-page":"73","article-title":"Throughput optimization and resource allocation on gpus under multi-application execution","author":"punyala","year":"2018","journal-title":"Design Automation & Test in Europe Conference & Exhibition"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI.2008.43"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2009.4919640"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/2038916.2038941"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2009.5090632"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2014.62"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/1785481.1785498"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2014.6844477"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/3061639.3062277"},{"key":"ref22","first-page":"51","article-title":"Agesim: A simulation framework for evaluating the lifetime reliability of processor-based socs","author":"huang","year":"2010","journal-title":"Proceedings of the conference on Design Automation and Test in Europe"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2007.11"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1049\/ip-i-1.1983.0026"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2008810"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2009.5306797"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2009.4919648"}],"event":{"name":"2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)","start":{"date-parts":[[2018,10,8]]},"location":"Chicago, IL","end":{"date-parts":[[2018,10,10]]}},"container-title":["2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8586781\/8602813\/08602850.pdf?arnumber=8602850","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,25]],"date-time":"2022-01-25T23:50:33Z","timestamp":1643154633000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8602850\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,10]]},"references-count":27,"URL":"https:\/\/doi.org\/10.1109\/dft.2018.8602850","relation":{},"subject":[],"published":{"date-parts":[[2018,10]]}}}