{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T05:08:04Z","timestamp":1725599284176},"reference-count":15,"publisher":"IEEE","license":[{"start":{"date-parts":[[2021,10,6]],"date-time":"2021-10-06T00:00:00Z","timestamp":1633478400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2021,10,6]],"date-time":"2021-10-06T00:00:00Z","timestamp":1633478400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021,10,6]]},"DOI":"10.1109\/dft52944.2021.9568294","type":"proceedings-article","created":{"date-parts":[[2021,10,20]],"date-time":"2021-10-20T19:30:07Z","timestamp":1634758207000},"page":"1-4","source":"Crossref","is-referenced-by-count":0,"title":["Mitigation of the impact of across chip systematic process variation using a novel system level design"],"prefix":"10.1109","author":[{"given":"Nabanita","family":"Ghoshal","sequence":"first","affiliation":[{"name":"XILINX,Hyderabad,India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sree Rama KC","family":"Saraswatula","sequence":"additional","affiliation":[{"name":"XILINX,Hyderabad,India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Santosh","family":"Yachareni","sequence":"additional","affiliation":[{"name":"XILINX,Hyderabad,India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Shidong","family":"Zhou","sequence":"additional","affiliation":[{"name":"XILINX,San Jose,USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Anil Kumar","family":"Kandala","sequence":"additional","affiliation":[{"name":"XILINX,Hyderabad,India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Narendra Kumar","family":"Pulipati","sequence":"additional","affiliation":[{"name":"XILINX,Hyderabad,India"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"journal-title":"Methods and circuits for testing a circuit fabrication process for device uniformity","year":"2003","author":"calderone","key":"ref10"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/66.554480"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2013.6651901"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/1146909.1147069"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/43.998626"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2010.2089568"},{"journal-title":"Managing Lithographic Variations in Design Reliability and Test Using Statistical Techniques","year":"2011","author":"aswin","key":"ref4"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2015789"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2008.4484006"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1117\/12.483664"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISSM.2003.1243278"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2011.2121913"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ICCES.2017.8275272"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2007.131"},{"key":"ref9","article-title":"Hierarchical modeling of spatial variability with a 45nm example","author":"qian","year":"0","journal-title":"Proc SPIE 7275 Design for Manufacturability Through Design-Process Integration III"}],"event":{"name":"2021 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)","start":{"date-parts":[[2021,10,6]]},"location":"Athens, Greece","end":{"date-parts":[[2021,10,8]]}},"container-title":["2021 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9568273\/9568279\/09568294.pdf?arnumber=9568294","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,8,3]],"date-time":"2022-08-03T00:07:24Z","timestamp":1659485244000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9568294\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,10,6]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/dft52944.2021.9568294","relation":{},"subject":[],"published":{"date-parts":[[2021,10,6]]}}}