{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,20]],"date-time":"2025-12-20T22:01:25Z","timestamp":1766268085701,"version":"3.29.0"},"reference-count":14,"publisher":"IEEE","license":[{"start":{"date-parts":[[2024,10,8]],"date-time":"2024-10-08T00:00:00Z","timestamp":1728345600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,10,8]],"date-time":"2024-10-08T00:00:00Z","timestamp":1728345600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2024,10,8]]},"DOI":"10.1109\/dft63277.2024.10753562","type":"proceedings-article","created":{"date-parts":[[2024,11,20]],"date-time":"2024-11-20T18:56:38Z","timestamp":1732128998000},"page":"1-6","source":"Crossref","is-referenced-by-count":2,"title":["Inferred Fault Models for RISC-V and Arm: A Comparative Study"],"prefix":"10.1109","author":[{"given":"Ihab","family":"Alshaer","sequence":"first","affiliation":[{"name":"Univ. Grenoble Alpes, Grenoble INP, LCIS,Valence,France,26000"}]},{"given":"Ahmed","family":"Al-kaf","sequence":"additional","affiliation":[{"name":"Univ. Grenoble Alpes, Grenoble INP, LCIS,Valence,France,26000"}]},{"given":"Valentin","family":"Egloff","sequence":"additional","affiliation":[{"name":"Univ. Grenoble Alpes, Grenoble INP, LCIS,Valence,France,26000"}]},{"given":"Vincent","family":"Beroulle","sequence":"additional","affiliation":[{"name":"Univ. Grenoble Alpes, Grenoble INP, LCIS,Valence,France,26000"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/DSD57027.2022.00068"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/FDTC.2016.18"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/FDTC.2013.9"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/FDTC53659.2021.00020"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/AsianHOST51057.2020.9358270"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/3339252.3339253"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/FDTC53659.2021.00014"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/FDTC51366.2020.00009"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED48828.2020.9137051"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1007\/s13389-024-00352-6"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-031-54409-5_1"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/3446214"},{"volume-title":"The RISC-V Instruction Set Manual Volume I: Unprivileged ISA","year":"2024","key":"ref13"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-10175-0_17"}],"event":{"name":"2024 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)","start":{"date-parts":[[2024,10,8]]},"location":"Didcot, United Kingdom","end":{"date-parts":[[2024,10,10]]}},"container-title":["2024 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/10753497\/10753498\/10753562.pdf?arnumber=10753562","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,11,27]],"date-time":"2024-11-27T17:57:26Z","timestamp":1732730246000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10753562\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,10,8]]},"references-count":14,"URL":"https:\/\/doi.org\/10.1109\/dft63277.2024.10753562","relation":{},"subject":[],"published":{"date-parts":[[2024,10,8]]}}}