{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,26]],"date-time":"2025-11-26T07:35:01Z","timestamp":1764142501661,"version":"3.46.0"},"reference-count":12,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,10,21]],"date-time":"2025-10-21T00:00:00Z","timestamp":1761004800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,10,21]],"date-time":"2025-10-21T00:00:00Z","timestamp":1761004800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,10,21]]},"DOI":"10.1109\/dft66274.2025.11257548","type":"proceedings-article","created":{"date-parts":[[2025,11,25]],"date-time":"2025-11-25T18:27:02Z","timestamp":1764095222000},"page":"1-7","source":"Crossref","is-referenced-by-count":0,"title":["Analysis of Repair Structures for Chiplet Interfaces"],"prefix":"10.1109","author":[{"given":"Th\u00e9o","family":"Bermond","sequence":"first","affiliation":[{"name":"Uviv. Grenoble Alpes,CEA, LIST,Grenoble,France"}]},{"given":"Adrian","family":"Evans","sequence":"additional","affiliation":[{"name":"Uviv. Grenoble Alpes,CEA, LIST,Grenoble,France"}]}],"member":"263","reference":[{"volume-title":"Advanced Interface Bus (AIB) Specification","key":"ref1"},{"journal-title":"JEDEC","article-title":"Jedec standard jesd235d - high bandwidth memory (hbm) dram","year":"2021","key":"ref2"},{"volume-title":"Universal Chiplet Interconnect Express (UCIe)","year":"2022","key":"ref3"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2019.2910528"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/SISPAD.2019.8870476"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ETS61313.2024.10567355"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/CICC51472.2021.9431555"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ETS61313.2024.10567470"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/VTS60656.2024.10538776"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ITC58126.2025.00009"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/VTS52500.2021.9794149"},{"volume-title":"UCIe 2.0 Specification","year":"2024","key":"ref12"}],"event":{"name":"2025 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)","start":{"date-parts":[[2025,10,21]]},"location":"Barcelona, Spain","end":{"date-parts":[[2025,10,23]]}},"container-title":["2025 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11253546\/11257433\/11257548.pdf?arnumber=11257548","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,11,26]],"date-time":"2025-11-26T07:29:14Z","timestamp":1764142154000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11257548\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,10,21]]},"references-count":12,"URL":"https:\/\/doi.org\/10.1109\/dft66274.2025.11257548","relation":{},"subject":[],"published":{"date-parts":[[2025,10,21]]}}}