{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T21:49:57Z","timestamp":1729633797748,"version":"3.28.0"},"reference-count":20,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/dftvs.2003.1250100","type":"proceedings-article","created":{"date-parts":[[2004,3,1]],"date-time":"2004-03-01T21:26:50Z","timestamp":1078176410000},"page":"97-104","source":"Crossref","is-referenced-by-count":0,"title":["On the test and diagnosis of the perfect shuffle"],"prefix":"10.1109","author":[{"given":"L.","family":"Schiano","sequence":"first","affiliation":[]},{"given":"F.","family":"Lombardi","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","first-page":"743","article-title":"Fault Diagnosis for a Class of Multistage Interconnection Networks","volume":"c30","author":"wu","year":"1981","journal-title":"IEEE Trans On Comput"},{"key":"ref11","first-page":"1485","article-title":"On The Constant Diagnosability of Baseline Interconnection Networks","volume":"c39","author":"lombardi","year":"1990","journal-title":"IEEE Trans Cotnput"},{"key":"ref12","first-page":"1340","article-title":"Detection and Location of Multiple Faults in Baseline Interconnection Networks","volume":"c41","author":"feng","year":"1992","journal-title":"IEEE Transactions on Computers"},{"key":"ref13","first-page":"579","author":"cormen","year":"1990","journal-title":"Introduction to Algorithms"},{"key":"ref14","first-page":"591","volume":"a","author":"leeuwen","year":"1990","journal-title":"Handbook of Theoretical Computer Science"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/4.75006"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/DFTVS.1991.199943"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/12.83638"},{"key":"ref18","article-title":"Computational Aspects of VLSI","author":"ullman","year":"1984","journal-title":"Computer Science Press"},{"key":"ref19","first-page":"75","article-title":"Exploring Trade-offs in Performance and Programmability of Processing Element Topologies for Network Processors","author":"gries","year":"2003","journal-title":"Proc IEEE Workshop on Net Proc"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/T-C.1974.223950"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1988.207790"},{"key":"ref6","first-page":"52","article-title":"Interconnect Testing with Boundary Scan","author":"wagner","year":"1987","journal-title":"International Test Conference"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/VTEST.1995.512646"},{"key":"ref8","first-page":"175","article-title":"Automatic Generation of FPGA Routing Architectures From High-Level Descriptions","author":"betz","year":"2000","journal-title":"Proc ACM Int Symp on FPGAs"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1989.82279"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1990.114069"},{"key":"ref1","first-page":"64","article-title":"A Massively Multithreaded Packet Processors","author":"melvin","year":"2003","journal-title":"Proc Network Processor Workshop"},{"key":"ref9","doi-asserted-by":"crossref","first-page":"80","DOI":"10.1109\/FPGA.1996.242433","article-title":"universal switch-module design for symmetric-array-based fpgas","author":"chang","year":"1996","journal-title":"Fourth International ACM Symposium on Field-Programmable Gate Arrays"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/C-M.1981.220297"}],"event":{"name":"18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems","acronym":"DFTVS-03","location":"Boston, MA, USA"},"container-title":["Proceedings. 16th IEEE Symposium on Computer Arithmetic"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8839\/27973\/01250100.pdf?arnumber=1250100","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,16]],"date-time":"2017-06-16T00:05:49Z","timestamp":1497571549000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1250100\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":20,"URL":"https:\/\/doi.org\/10.1109\/dftvs.2003.1250100","relation":{},"subject":[]}}