{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,29]],"date-time":"2024-10-29T15:12:15Z","timestamp":1730214735659,"version":"3.28.0"},"reference-count":16,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/dftvs.2003.1250122","type":"proceedings-article","created":{"date-parts":[[2004,3,1]],"date-time":"2004-03-01T21:26:50Z","timestamp":1078176410000},"page":"279-286","source":"Crossref","is-referenced-by-count":7,"title":["Analysis and testing of analog and mixed-signal circuits by an operation-region model: a case study of application and implementation"],"prefix":"10.1109","author":[{"given":"Y.","family":"Miura","sequence":"first","affiliation":[]},{"given":"D.","family":"Kato","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","first-page":"943","article-title":"Fault Behavior and Change in Internal Condition of Mixed-Signal Circuits","volume":"e83 d","author":"miura","year":"2000","journal-title":"IEICE Trans Inf & Syst"},{"key":"ref11","article-title":"Proposal of an Operation-Region Model for Analyzing Analog and Mixed-Signal Circuits","author":"miura","year":"2001","journal-title":"2nd IEEE Latin-American Test Workshop"},{"key":"ref12","first-page":"215","article-title":"A Novel Approach for Modeling Behavior of Analog and Mixed-Signal Circuits Based on an Operation-Region Model","author":"miura","year":"2002","journal-title":"Proc European Test Workshop 2002"},{"doi-asserted-by":"publisher","key":"ref13","DOI":"10.1109\/TEST.1997.639612"},{"doi-asserted-by":"publisher","key":"ref14","DOI":"10.1109\/TEST.2000.894317"},{"key":"ref15","article-title":"X-Y Zoning BIST: An FPAA Experiment","author":"sanahuja","year":"2002","journal-title":"9th IEEE Int Mixed-Signal Test Workshop"},{"year":"0","article-title":"Benchmark Circuits for Analog and Mixed Signal Testing","key":"ref16"},{"doi-asserted-by":"publisher","key":"ref4","DOI":"10.1109\/4.663562"},{"doi-asserted-by":"publisher","key":"ref3","DOI":"10.1007\/BF00137566"},{"doi-asserted-by":"publisher","key":"ref6","DOI":"10.1109\/54.124515"},{"doi-asserted-by":"publisher","key":"ref5","DOI":"10.1109\/82.728852"},{"key":"ref8","first-page":"184","article-title":"A Method to Diagnose Faults in Linear Analog Circuits Using an Adaptive Testing","author":"cota","year":"1999","journal-title":"Proc Design Automation and Test in Europe"},{"doi-asserted-by":"publisher","key":"ref7","DOI":"10.1109\/82.486460"},{"doi-asserted-by":"publisher","key":"ref2","DOI":"10.1109\/TEST.1995.529818"},{"doi-asserted-by":"publisher","key":"ref1","DOI":"10.1109\/43.285252"},{"key":"ref9","first-page":"195","article-title":"Parametric Fault Diagnosis for Analog Systems Using Functional Mapping","author":"cherubal","year":"1999","journal-title":"Proc Design Automation and Test in Europe"}],"event":{"acronym":"DFTVS-03","name":"18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems","location":"Boston, MA, USA"},"container-title":["Proceedings. 16th IEEE Symposium on Computer Arithmetic"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8839\/27973\/01250122.pdf?arnumber=1250122","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,13]],"date-time":"2017-03-13T15:44:43Z","timestamp":1489419883000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1250122\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":16,"URL":"https:\/\/doi.org\/10.1109\/dftvs.2003.1250122","relation":{},"subject":[]}}