{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,29]],"date-time":"2024-10-29T15:12:19Z","timestamp":1730214739490,"version":"3.28.0"},"reference-count":16,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/dftvs.2003.1250133","type":"proceedings-article","created":{"date-parts":[[2004,3,2]],"date-time":"2004-03-02T02:26:50Z","timestamp":1078194410000},"page":"369-376","source":"Crossref","is-referenced-by-count":1,"title":["Fault tolerant Hopfield associative memory on torus"],"prefix":"10.1109","author":[{"given":"R.A.","family":"Ayoubi","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"H.A.","family":"Ziade","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M.A.","family":"Bayoumi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"ref10","DOI":"10.1109\/TC.1984.1676475"},{"doi-asserted-by":"publisher","key":"ref11","DOI":"10.1109\/12.106224"},{"doi-asserted-by":"publisher","key":"ref12","DOI":"10.1109\/72.363476"},{"doi-asserted-by":"publisher","key":"ref13","DOI":"10.1109\/ISCAS.1990.112544"},{"doi-asserted-by":"publisher","key":"ref14","DOI":"10.1016\/S0893-6080(98)00092-6"},{"key":"ref15","first-page":"109","article-title":"An efficient implementation of multilayer percetrpon on mesh architecture","volume":"2","author":"ayoubi","year":"2002","journal-title":"proceedings of IEEE International Symposium on Circuits and Systems"},{"doi-asserted-by":"publisher","key":"ref16","DOI":"10.1109\/12.391184"},{"doi-asserted-by":"publisher","key":"ref4","DOI":"10.1109\/21.155944"},{"doi-asserted-by":"publisher","key":"ref3","DOI":"10.1109\/72.105414"},{"doi-asserted-by":"publisher","key":"ref6","DOI":"10.1109\/72.248456"},{"doi-asserted-by":"publisher","key":"ref5","DOI":"10.1109\/IJCNN.1990.137651"},{"year":"1978","author":"wakerly","journal-title":"Error Detecting Codes Self-Checking Circuits and Applications","key":"ref8"},{"doi-asserted-by":"publisher","key":"ref7","DOI":"10.1109\/PROC.1978.11107"},{"key":"ref2","first-page":"1918","article-title":"Fault models for artificial networks","volume":"3","author":"bolt","year":"1991","journal-title":"Proceedings of International Joint Conference on Neural Networks"},{"doi-asserted-by":"publisher","key":"ref1","DOI":"10.1073\/pnas.81.10.3088"},{"doi-asserted-by":"publisher","key":"ref9","DOI":"10.1109\/71.265948"}],"event":{"acronym":"DFTVS-03","name":"18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems","location":"Boston, MA, USA"},"container-title":["Proceedings. 16th IEEE Symposium on Computer Arithmetic"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8839\/27973\/01250133.pdf?arnumber=1250133","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,13]],"date-time":"2017-03-13T18:37:08Z","timestamp":1489430228000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1250133\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":16,"URL":"https:\/\/doi.org\/10.1109\/dftvs.2003.1250133","relation":{},"subject":[]}}