{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,29]],"date-time":"2025-08-29T10:33:06Z","timestamp":1756463586297,"version":"3.28.0"},"reference-count":7,"publisher":"IEEE","license":[{"start":{"date-parts":[[2023,6,25]],"date-time":"2023-06-25T00:00:00Z","timestamp":1687651200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,6,25]],"date-time":"2023-06-25T00:00:00Z","timestamp":1687651200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023,6,25]]},"DOI":"10.1109\/drc58590.2023.10186959","type":"proceedings-article","created":{"date-parts":[[2023,7,24]],"date-time":"2023-07-24T17:39:05Z","timestamp":1690220345000},"page":"1-2","source":"Crossref","is-referenced-by-count":7,"title":["5nm FinFET Cryogenic SRAM Evaluation for Quantum Computing"],"prefix":"10.1109","author":[{"given":"Shivendra Singh","family":"Parihar","sequence":"first","affiliation":[{"name":"University of Stuttgart,Chair of Semiconductor Test and Reliability (STAR),Stuttgart,Germany,70569"}]},{"given":"Simon","family":"Thomann","sequence":"additional","affiliation":[{"name":"University of Stuttgart,Chair of Semiconductor Test and Reliability (STAR),Stuttgart,Germany,70569"}]},{"given":"Girish","family":"Pahwa","sequence":"additional","affiliation":[{"name":"University of California, Berkeley,Berkeley,CA,USA,94720"}]},{"given":"Yogesh Singh","family":"Chauhan","sequence":"additional","affiliation":[{"name":"Indian Institute of Technology Kanpur,Kanpur,India,208016"}]},{"given":"Hussam","family":"Amrouch","sequence":"additional","affiliation":[{"name":"University of Stuttgart,Chair of Semiconductor Test and Reliability (STAR),Stuttgart,Germany,70569"}]}],"member":"263","reference":[{"key":"ref7","first-page":"8.6.1","author":"hu","year":"0","journal-title":"IEDM Tech Dig"},{"key":"ref4","first-page":"1","author":"choi","year":"0","journal-title":"VLSI"},{"key":"ref3","first-page":"36.7.1","author":"yeap","year":"0","journal-title":"IEDM Tech Dig"},{"key":"ref6","first-page":"4233","volume":"68","author":"pahwa","year":"2021","journal-title":"IEEE-TED"},{"key":"ref5","first-page":"1","author":"chiang","year":"0","journal-title":"VLSI"},{"key":"ref2","first-page":"38.5.1","author":"wang","year":"0","journal-title":"IEDM Tech Dig"},{"key":"ref1","first-page":"25.2.1","author":"sebastiano","year":"0","journal-title":"IEDM Tech Dig"}],"event":{"name":"2023 Device Research Conference (DRC)","start":{"date-parts":[[2023,6,25]]},"location":"Santa Barbara, CA, USA","end":{"date-parts":[[2023,6,28]]}},"container-title":["2023 Device Research Conference (DRC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10186880\/10186890\/10186959.pdf?arnumber=10186959","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,8,14]],"date-time":"2023-08-14T17:36:23Z","timestamp":1692034583000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10186959\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,6,25]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/drc58590.2023.10186959","relation":{},"subject":[],"published":{"date-parts":[[2023,6,25]]}}}