{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T20:55:39Z","timestamp":1729630539644,"version":"3.28.0"},"reference-count":12,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/dsd.2002.1115346","type":"proceedings-article","created":{"date-parts":[[2003,6,25]],"date-time":"2003-06-25T21:03:42Z","timestamp":1056575022000},"page":"12-19","source":"Crossref","is-referenced-by-count":0,"title":["Formal verification of a DSP chip using an iterative approach"],"prefix":"10.1109","author":[{"given":"A.","family":"Habibi","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"S.","family":"Tahar","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"A.","family":"Ghazel","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","article-title":"new_ theory 'HOL ‘","author":"birtwistle","year":"1994","journal-title":"An Introduction to Hardware Verification in Higher Order Logic"},{"year":"1986","author":"andrews","article-title":"An Introduction to Higher Order Logic: To Truth through Proof.","key":"ref3"},{"year":"1997","author":"milner","article-title":"The definition of Standard M L.","key":"ref10"},{"doi-asserted-by":"publisher","key":"ref6","DOI":"10.1145\/242223.242257"},{"year":"1999","author":"steven","article-title":"The Scientist and Engineer's Guide to Digital Signal Processing","key":"ref11"},{"key":"ref5","doi-asserted-by":"crossref","first-page":"275","DOI":"10.1007\/BFb0031816","article-title":"ACL2 Theorems about Commercial Microprocessors, Formal Methods in Computer-Aided Design","author":"brock","year":"1996","journal-title":"Lecture Notes in Computer Science 1166"},{"key":"ref12","doi-asserted-by":"crossref","first-page":"159","DOI":"10.1023\/A:1008622002590","article-title":"A Practical Methodology for the Formal Verification of RISC Processors","volume":"13","year":"1998","journal-title":"Formal Methods in Systems Design"},{"year":"1990","author":"higgins","article-title":"Digital Signal Processing in VLSI.","key":"ref8"},{"year":"1993","author":"gordon","article-title":"Introduction to HOL: A theorem Proving Environment for Higher-Order Logic","key":"ref7"},{"year":"1996","journal-title":"Data sheet of the ADSP-2100 Family DSP - Microcomputers - ADSP-21xx","article-title":"Applications Engineering Staff of Analog Devices, DSP Division","key":"ref2"},{"doi-asserted-by":"publisher","key":"ref9","DOI":"10.1017\/CBO9780511569845"},{"year":"1996","journal-title":"Digital Signal Processing Applications Using the ADSP-2100 Family","article-title":"Applications Engineering Staff of Analog Devices, DSP Division.","key":"ref1"}],"event":{"acronym":"DSD-02","name":"Euromicro Symposium on Digital System Design. DSD'2002","location":"Dortmund, Germany"},"container-title":["Proceedings Euromicro Symposium on Digital System Design. Architectures, Methods and Tools"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8187\/24597\/01115346.pdf?arnumber=1115346","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,15]],"date-time":"2017-06-15T18:45:09Z","timestamp":1497552309000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1115346\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":12,"URL":"https:\/\/doi.org\/10.1109\/dsd.2002.1115346","relation":{},"subject":[]}}