{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T05:20:48Z","timestamp":1729660848826,"version":"3.28.0"},"reference-count":23,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2003]]},"DOI":"10.1109\/dsd.2003.1231929","type":"proceedings-article","created":{"date-parts":[[2004,3,22]],"date-time":"2004-03-22T14:34:28Z","timestamp":1079966068000},"page":"214-221","source":"Crossref","is-referenced-by-count":2,"title":["Estimating the utilization of embedded FPGA co-processor"],"prefix":"10.1109","author":[{"family":"Yang Qu","sequence":"first","affiliation":[]},{"given":"J.-P.","family":"Soininen","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1990.114832"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/43.149767"},{"key":"ref12","first-page":"36","article-title":"Estimating Architectural Resources and Performance for High-Level Synthesis Applications","volume":"1","author":"sharma","year":"1994","journal-title":"IEEE Trans VLSI Systems"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.1998.669500"},{"key":"ref14","first-page":"37","article-title":"SUIF: An Infrastructure for Research on Parallelzing and Optimizing Compilers","author":"wilson","year":"1999","journal-title":"Proceedings of the 7th ACM SIGPLAN symposium on Principles and practice of parallel programming"},{"journal-title":"Synplicity Inc Synplify Pro Reference Manual","year":"2003","key":"ref15"},{"article-title":"High-level synthesis: Introduction to chip and system design","year":"1997","author":"gajski","key":"ref16"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1992.227792"},{"journal-title":"Xilinx Inc Virtex-2 FPGA production specification","year":"2003","key":"ref18"},{"journal-title":"MPEG MPEG System Softwares","year":"2003","key":"ref19"},{"key":"ref4","first-page":"20","article-title":"A New Integer Linear Programming Formulation for the Scheduling Problem in Data-Path Synthesis","author":"lee","year":"1989","journal-title":"Proceeding of the International Conference on Computer-Aided Design"},{"key":"ref3","first-page":"171","article-title":"Mappability estimation approach for processor architecture evaluation","author":"soininen","year":"2002","journal-title":"Proceeding of 20th IEEE Norchip Conference NORCHIP 2002"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/43.31534"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/43.31522"},{"key":"ref8","doi-asserted-by":"crossref","first-page":"210","DOI":"10.1145\/37888.37920","article-title":"real: a program for register allocation","author":"kurdahi","year":"1987","journal-title":"24th ACM\/IEEE Design Automation Conference"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.1986.1270207"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/508352.508353"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/2.976918"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/123186.123350"},{"key":"ref20","first-page":"30","article-title":"Hardware\/software partitioning of embedded system in OCAPI-xl","author":"vanmeerbeeck","year":"2001","journal-title":"Proc 9th Int Symp Hardware\/Software Codesign"},{"article-title":"VCC: Function-Architecture Co-Design: Modeling and Examples","year":"2001","author":"martin","key":"ref22"},{"journal-title":"Cadence Design Systems Inc CiertoTM Virtual Component Co-design Modeling Guide","year":"2002","key":"ref21"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/2.982917"}],"event":{"name":"Proceedings. Euromicro Symposium on Digital System Design","start":{"date-parts":[[2003,9,1]]},"location":"Belek-Antalya, Turkey","end":{"date-parts":[[2003,9,6]]}},"container-title":["Euromicro Symposium on Digital System Design, 2003. Proceedings."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8715\/27588\/01231929.pdf?arnumber=1231929","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,16]],"date-time":"2017-06-16T04:26:33Z","timestamp":1497587193000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1231929\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2003]]},"references-count":23,"URL":"https:\/\/doi.org\/10.1109\/dsd.2003.1231929","relation":{},"subject":[],"published":{"date-parts":[[2003]]}}}