{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T21:15:48Z","timestamp":1725657348124},"reference-count":12,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2003]]},"DOI":"10.1109\/dsd.2003.1231939","type":"proceedings-article","created":{"date-parts":[[2004,3,22]],"date-time":"2004-03-22T09:34:28Z","timestamp":1079948068000},"page":"255-263","source":"Crossref","is-referenced-by-count":10,"title":["Design tools and reusable libraries for FPGA-based digital circuits"],"prefix":"10.1109","author":[{"given":"V.","family":"Sklyarov","sequence":"first","affiliation":[]},{"given":"I.","family":"Skliarova","sequence":"additional","affiliation":[]},{"given":"P.","family":"Almeida","sequence":"additional","affiliation":[]},{"given":"M.","family":"Almeida","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"journal-title":"Electronic Assembly products","year":"0","key":"ref4"},{"journal-title":"Spartan-IIE Development Platform","year":"0","key":"ref3"},{"journal-title":"The C Programming Language","year":"1988","author":"kernighan","key":"ref10"},{"key":"ref6","article-title":"Architecture of Reconfigurable Processor for Implementing Search Algorithms over Discrete Matrices","author":"sklyarov","year":"2003","journal-title":"Proc ERSA 2003"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/92.766749"},{"journal-title":"the discipline “Computação Reconfigurável” public domain is indicated by the letter “i” enclosed in a circle Login and password for access to the protected section can also be provided (via e-mails skl ieeta pt iouliia det ua pt)","article-title":"2 semester","year":"0","key":"ref5"},{"key":"ref12","first-page":"270","article-title":"A hardware\/software approach to accelerate Boolean satisfiability","author":"skliarova","year":"0","journal-title":"Proc of IEEE DDECS'2002"},{"key":"ref8","article-title":"Design of Digital Circuits on the Basis of Hardware Templates","author":"sklyarov","year":"2003","journal-title":"In Proc ESANN'2003"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1016\/S1383-7621(02)00067-X"},{"journal-title":"Alpha Data","year":"0","key":"ref2"},{"journal-title":"Logical Synthesis of Cascade Networks","year":"1981","author":"zakrevski","key":"ref9"},{"journal-title":"Handel-C DK 1 RC100","year":"0","key":"ref1"}],"event":{"name":"Proceedings. Euromicro Symposium on Digital System Design","start":{"date-parts":[[2003,9,1]]},"location":"Belek-Antalya, Turkey","end":{"date-parts":[[2003,9,6]]}},"container-title":["Euromicro Symposium on Digital System Design, 2003. Proceedings."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8715\/27588\/01231939.pdf?arnumber=1231939","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,13]],"date-time":"2017-03-13T20:15:53Z","timestamp":1489436153000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1231939\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2003]]},"references-count":12,"URL":"https:\/\/doi.org\/10.1109\/dsd.2003.1231939","relation":{},"subject":[],"published":{"date-parts":[[2003]]}}}