{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T14:54:32Z","timestamp":1725461672981},"reference-count":12,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2007,8]]},"DOI":"10.1109\/dsd.2007.4341485","type":"proceedings-article","created":{"date-parts":[[2007,10,9]],"date-time":"2007-10-09T13:45:59Z","timestamp":1191937559000},"page":"307-310","source":"Crossref","is-referenced-by-count":1,"title":["Energy Based Design Space Exploration of Multiprocessor VLIW Architectures"],"prefix":"10.1109","author":[{"given":"Manoj","family":"Gupta","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mayank","family":"Gupta","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Neeraj","family":"Goel","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M.","family":"Balaksrishnan","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","article-title":"Tools and Techniques for Building Fast Portable Threads Packages","author":"keppel","year":"1993","journal-title":"Washington University Department of Computer Science technical report"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/92.532037"},{"journal-title":"CACTI 3 0 An integrated cache timing power and area model Technical report Compaq Computer Corporation","year":"2001","key":"ref10"},{"key":"ref6","article-title":"The Semantics of a Simple Language for Parallel Programming","author":"kahn","year":"0","journal-title":"Proc of the IFIP Congress 74 North-Holland Publishing Co"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/92.335012"},{"journal-title":"Exploiting Coarse Grain Parallelism in MPEG-2 Alogorithm Technical Report CSL-TR-98–771 Stanford University Computer Systems Laboratory","year":"1998","author":"iwata","key":"ref5"},{"key":"ref12","doi-asserted-by":"crossref","first-page":"305","DOI":"10.1145\/280756.280943","article-title":"The energy complexity of register files","author":"zyuban","year":"1998","journal-title":"Proceedings 1998 International Symposium on Low Power Electronics and Design (IEEE Cat No 98TH8379) LPE"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/92.335013"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2002.801105"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/371636.371692"},{"journal-title":"Impact An architectural Framework for Multiple-Instruction-Issue Processors","year":"1991","author":"chang","key":"ref9"},{"journal-title":"HPL-PD Architecture Specification Version 1 0 Technical Report HPL-93–80R1 HP Research Labs","year":"1993","author":"kathail","key":"ref1"}],"event":{"name":"10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD 2007)","start":{"date-parts":[[2007,8,29]]},"location":"Lubeck, Germany","end":{"date-parts":[[2007,8,31]]}},"container-title":["10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD 2007)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4341432\/4341433\/04341485.pdf?arnumber=4341485","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,17]],"date-time":"2017-06-17T19:46:25Z","timestamp":1497728785000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4341485\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2007,8]]},"references-count":12,"URL":"https:\/\/doi.org\/10.1109\/dsd.2007.4341485","relation":{},"subject":[],"published":{"date-parts":[[2007,8]]}}}