{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,29]],"date-time":"2025-09-29T11:48:08Z","timestamp":1759146488369,"version":"3.28.0"},"reference-count":39,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/dsn.2003.1209958","type":"proceedings-article","created":{"date-parts":[[2004,6,22]],"date-time":"2004-06-22T16:27:43Z","timestamp":1087921663000},"page":"479-488","source":"Crossref","is-referenced-by-count":23,"title":["A hybrid fault injection approach based on simulation and emulation co-operation"],"prefix":"10.1109","author":[{"given":"A.","family":"Ejlali","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"S.G.","family":"Miremadi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"H.","family":"Zarandi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"G.","family":"Asadi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"S.B.","family":"Sarmadi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"19","first-page":"233","article-title":"Comparison and application of different VHDL-based fault injection techniques","author":"gracia","year":"2001","journal-title":"Proc IEEE Int'l Symp Defect and Fault Tolerance in VLSI Systems"},{"journal-title":"Synthesis and Optimization of Digital Circuits","year":"1994","author":"de micheli","key":"35"},{"key":"17","doi-asserted-by":"publisher","DOI":"10.1109\/FTCS.1998.689479"},{"key":"36","first-page":"328","article-title":"Two Soft-ware Techniques for On-Line Error Detection","author":"miremadi","year":"1992","journal-title":"Proc IEEE Int'l Symp Fault-Tolerant Computing"},{"key":"18","doi-asserted-by":"publisher","DOI":"10.1109\/12.559803"},{"key":"33","doi-asserted-by":"publisher","DOI":"10.1109\/OLT.2002.1030192"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/23.983197"},{"key":"34","first-page":"199","article-title":"RIFLE: A General Purpose Pin-Level Fault Injector","author":"madeira","year":"1994","journal-title":"Proc First European Dependable Computing Conf"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1109\/FTCS.1990.89371"},{"key":"39","doi-asserted-by":"publisher","DOI":"10.1109\/FTCS.1997.614074"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/43.790625"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/12.214660"},{"key":"37","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4615-5161-4"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/32.666826"},{"key":"38","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.1998.669529"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2002.1041847"},{"year":"0","key":"21"},{"key":"20","doi-asserted-by":"publisher","DOI":"10.1109\/FTCS.1989.105590"},{"year":"0","key":"22"},{"key":"23","doi-asserted-by":"crossref","first-page":"724","DOI":"10.1109\/43.712103","article-title":"Sequential Circuit Fault Simulation Using Logic Emulation","volume":"17","author":"hwang","year":"1998","journal-title":"IEEE Trans Computer-Aided Design of Integrated Circuits and Systems"},{"journal-title":"IEEE Standard VHDL Language Reference Manual","year":"0","key":"24"},{"journal-title":"IEEE Standard Verilog HDL Language Reference Manual","year":"0","key":"25"},{"key":"26","doi-asserted-by":"publisher","DOI":"10.1109\/FTCS.1994.315656"},{"journal-title":"Design and Analysis of Fault-Tolerant Digital Systems","year":"1989","author":"johnson","key":"27"},{"key":"28","doi-asserted-by":"publisher","DOI":"10.1109\/FTCS.1992.243567"},{"key":"29","doi-asserted-by":"publisher","DOI":"10.1109\/32.256857"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/32.44380"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2001.941394"},{"key":"10","first-page":"847","article-title":"New techniques for speeding-up fault-injection campaigns Design","author":"berrojo","year":"2002","journal-title":"Proc Design Automation Test Europe Conf Exhibition"},{"journal-title":"Digital Systems Testing and Testable Design Revised Edition","year":"1995","author":"abramovici","key":"1"},{"key":"30","first-page":"150","article-title":"Application of Three Physical Fault Injection Techniques to the Experimental Assessment of the MARS Architecture","volume":"dcca 5","author":"karlsson","year":"1995","journal-title":"Proc Fifth IFIP Working Conf Dependable Computing for Critical Applications"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/12.54853"},{"key":"6","first-page":"283","article-title":"Speeding up Design Verification Using Co-operation of Simulation and Emulation","author":"asadi","year":"2002","journal-title":"Proc 2002 IEEE-TTTC Int'l Conf Automation Quality and Testing Robotics"},{"key":"32","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1997.597141"},{"key":"5","first-page":"240","article-title":"Test Generation and Fault Simulation for Behavioral Models","author":"armstrong","year":"1992","journal-title":"Performance and Fault Modeling with VHDL"},{"key":"31","doi-asserted-by":"publisher","DOI":"10.1109\/ASIC.1993.410733"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/12.980005"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1145\/296333.296351"},{"key":"8","first-page":"15","article-title":"Fast Prototyping with Co-operation of Simulation and Emulation","author":"bayat sarmadi","year":"2002","journal-title":"Proc 12th Int'l Conf Field Programmable Logic and Application (FPL 2002)"}],"event":{"name":"2003 International Conference on Dependable Systems and Networks, 2003.","location":"San Francisco, CA, USA"},"container-title":["2003 International Conference on Dependable Systems and Networks, 2003. Proceedings."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8589\/27228\/01209958.pdf?arnumber=1209958","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,16]],"date-time":"2017-06-16T04:15:43Z","timestamp":1497586543000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1209958\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":39,"URL":"https:\/\/doi.org\/10.1109\/dsn.2003.1209958","relation":{},"subject":[]}}