{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,31]],"date-time":"2025-12-31T12:09:11Z","timestamp":1767182951031},"reference-count":33,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2012,6]]},"DOI":"10.1109\/dsn.2012.6263925","type":"proceedings-article","created":{"date-parts":[[2012,8,16]],"date-time":"2012-08-16T20:04:08Z","timestamp":1345147448000},"page":"1-12","source":"Crossref","is-referenced-by-count":23,"title":["High-performance parallel accelerator for flexible and efficient run-time monitoring"],"prefix":"10.1109","author":[{"given":"Daniel Y.","family":"Deng","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"G. Edward","family":"Suh","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"journal-title":"The SPARC Architecture Manual Version 8","year":"1992","key":"19"},{"key":"17","doi-asserted-by":"publisher","DOI":"10.1145\/1542476.1542504"},{"journal-title":"GRLIB IP Core User's Manual","year":"2008","author":"gaisler","key":"18"},{"key":"33","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.1996.564773"},{"key":"15","first-page":"225","article-title":"Hardware enforcement of application security policies using tagged memory","author":"zeldovich","year":"2008","journal-title":"Proceedings of the 8th USENIX Conference on Operating Systems Design and Implementation Ser OSDI'08"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2008.4771782"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2007.346205"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2011.6081438"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2008.20"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2010.17"},{"key":"21","article-title":"MiBench: A free, commercially representative embedded benchmark suite","author":"guthaus","year":"2001","journal-title":"Annual IEEE International Workshop on Workload Characterization"},{"journal-title":"Intel Atom Processor Z510","year":"2008","author":"coporation","key":"20"},{"key":"22","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1973.5009130"},{"key":"23","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2004.26"},{"journal-title":"Integrity Considerations for Secure Computer Systems","year":"1977","author":"biba","key":"24"},{"key":"25","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2009.5270347"},{"key":"26","doi-asserted-by":"publisher","DOI":"10.1145\/1508244.1508258"},{"key":"27","doi-asserted-by":"publisher","DOI":"10.1145\/1181309.1181319"},{"key":"28","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2008.4658637"},{"key":"29","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2003.821545"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1145\/1250662.1250722"},{"key":"2","article-title":"Dynamic taint analysis: Automatic detection, analysis, and signature generation of exploit attacks on commodity software","author":"newsome","year":"2005","journal-title":"Proceedings of the 2005 Network and Distributed Systems Symposium"},{"key":"10","article-title":"LIFT: A low-overhead practical information flow tracking system for detecting security attacks","author":"qin","year":"2006","journal-title":"Proceedings of the 30th International Symposium on Microarchitecture"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1145\/1024393.1024404"},{"key":"30","article-title":"A high-performance microarchitecture with hardware-programmable funct ional units","author":"razdan","year":"1994","journal-title":"Proceedings of the 27th Annual ACM\/IEEE International Symposium on Microarchitecture"},{"key":"7","doi-asserted-by":"crossref","first-page":"224","DOI":"10.1145\/1028176.1006720","article-title":"Iwatcher: Efficient architectural support for software debugging","author":"zhou","year":"2004","journal-title":"Proceedings of the 31st Annual International Symposium on Computer Architecture Ser ISCA '04"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1145\/1321631.1321673"},{"key":"32","article-title":"Garp: A MIPS processor with a reconfigurable coprocessor","author":"hauser","year":"1997","journal-title":"Proceedings of the 5th Annual IEEE Symposium on FPGAs for Custom Computing Machines"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1145\/1346281.1346295"},{"key":"31","article-title":"A reconfigurable multifunction computing cache architecture","author":"kim","year":"2000","journal-title":"Proc ACM\/SIGDA Int'l Symp Field-Programmable Gate Arrays"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1145\/605426.605429"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2007.18"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555806"}],"event":{"name":"2012 42nd Annual IEEE\/IFIP International Conference on Dependable Systems and Networks (DSN)","start":{"date-parts":[[2012,6,25]]},"location":"Boston, MA, USA","end":{"date-parts":[[2012,6,28]]}},"container-title":["IEEE\/IFIP International Conference on Dependable Systems and Networks (DSN 2012)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6253623\/6263904\/06263925.pdf?arnumber=6263925","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,20]],"date-time":"2017-06-20T22:56:16Z","timestamp":1497999376000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6263925\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,6]]},"references-count":33,"URL":"https:\/\/doi.org\/10.1109\/dsn.2012.6263925","relation":{},"subject":[],"published":{"date-parts":[[2012,6]]}}}