{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T08:54:11Z","timestamp":1725440051674},"reference-count":10,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2012,5]]},"DOI":"10.1109\/dtis.2012.6232986","type":"proceedings-article","created":{"date-parts":[[2012,7,19]],"date-time":"2012-07-19T23:41:56Z","timestamp":1342741316000},"page":"1-6","source":"Crossref","is-referenced-by-count":2,"title":["Modeling and design of a Folded Cascode bulk driven OTA"],"prefix":"10.1109","author":[{"given":"Intissar","family":"Toihria","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tixier","family":"Thierry","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"3","article-title":"Me?thodologie de conception d'un amplificateur ope?rationnel cmos de type cascade?","author":"m s ait ali","year":"0","journal-title":"JFA3"},{"key":"2","article-title":"Didacticiel pour l'enseignement de la conception de circuits inte?gre?s analogiques","author":"kayal","year":"0","journal-title":"J3eA Journal sur L'Enseignement des Sciences et Technologies de L'Information et des Syste?mes"},{"journal-title":"Introduction to Maxima","year":"0","author":"rand","key":"10"},{"journal-title":"Optimisation D'Architectures Inte?gre?es et Synthe?se Automatique de Layout","year":"2008","author":"labrak","key":"1"},{"journal-title":"Design of Tow-stage High Gain Operational Amplifier Using Current Buffer Compensation For Low Power","year":"0","author":"rajput","key":"7"},{"key":"6","article-title":"Re?alisation de Circuits Inte?gre?s D'Interface Pour Micro-Capteurs Capacitifs: Application a? un Microphone Usine? en Silicium","author":"amendol","year":"2001","journal-title":"The?se Universite? Paris 6 De?cembre"},{"journal-title":"Doctoral Degree Programme","year":"0","author":"feras moualla","key":"5"},{"journal-title":"Doctoral Degree Programme","year":"0","author":"khateb","key":"4"},{"key":"9","article-title":"Automated design of folded-cascode op-amps with sensitivity analysis","author":"maria del mar hershenson","year":"1998","journal-title":"Electronics Circuits and Systems"},{"journal-title":"Etude des Me?thodes de Conception et des Outils de CAO pour la Synthe?se des Circuits Inte?gre?s Analogiques","year":"1999","author":"faouzi chaahoub","key":"8"}],"event":{"name":"2012 7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)","start":{"date-parts":[[2012,5,16]]},"location":"Tunis, Tunisia","end":{"date-parts":[[2012,5,18]]}},"container-title":["7th International Conference on Design &amp; Technology of Integrated Systems in Nanoscale Era"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6225516\/6232941\/06232986.pdf?arnumber=6232986","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T15:37:26Z","timestamp":1490110646000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6232986\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,5]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/dtis.2012.6232986","relation":{},"subject":[],"published":{"date-parts":[[2012,5]]}}}