{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,13]],"date-time":"2026-01-13T21:01:06Z","timestamp":1768338066297,"version":"3.49.0"},"reference-count":9,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,5]]},"DOI":"10.1109\/dtis.2014.6850657","type":"proceedings-article","created":{"date-parts":[[2014,7,29]],"date-time":"2014-07-29T14:24:23Z","timestamp":1406643863000},"page":"1-6","source":"Crossref","is-referenced-by-count":2,"title":["Accurate multiplexed test structure for threshold voltage matching evaluation"],"prefix":"10.1109","author":[{"given":"Loic","family":"Welter","sequence":"first","affiliation":[]},{"given":"Philippe","family":"Dreux","sequence":"additional","affiliation":[]},{"given":"Jordan","family":"Innocenti","sequence":"additional","affiliation":[]},{"given":"Hassen","family":"Aziza","sequence":"additional","affiliation":[]},{"given":"Jean-Michel","family":"Portal","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"crossref","first-page":"1433","DOI":"10.1109\/JSSC.1989.572629","article-title":"Matching properties of MOS transistors","volume":"24","author":"pelgrom","year":"1989","journal-title":"IEEE J Solid-State Circuits"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.1998.746503"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/IOLTS.2013.6604061"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/ICMTS.2003.1197468"},{"key":"6","first-page":"3","article-title":"An integrated test chip for the complete characterization and monitoring of a 0.25?m CMOS technology that fits into five scribe line structures 150?m by 5000?m","author":"lefferts","year":"2003","journal-title":"International Conference on Microelectronic Test Structures"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2009.5355656"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/ISSM.2003.1243238"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/ICSICT.2010.5667684"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/ICMTS.1998.688028"}],"event":{"name":"2014 9th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)","location":"Santorini, Greece","start":{"date-parts":[[2014,5,6]]},"end":{"date-parts":[[2014,5,8]]}},"container-title":["2014 9th IEEE International Conference on Design &amp; Technology of Integrated Systems in Nanoscale Era (DTIS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6844517\/6850634\/06850657.pdf?arnumber=6850657","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,22]],"date-time":"2017-06-22T13:30:40Z","timestamp":1498138240000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6850657\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,5]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1109\/dtis.2014.6850657","relation":{},"subject":[],"published":{"date-parts":[[2014,5]]}}}