{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,20]],"date-time":"2025-12-20T22:01:48Z","timestamp":1766268108705,"version":"3.28.0"},"reference-count":17,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,4]]},"DOI":"10.1109\/dtis.2018.8368558","type":"proceedings-article","created":{"date-parts":[[2018,5,31]],"date-time":"2018-05-31T18:25:11Z","timestamp":1527791111000},"page":"1-6","source":"Crossref","is-referenced-by-count":4,"title":["Parallel software-based self-test suite for multi-core system-on-chip: Migration from single-core to multi-core automotive microcontrollers"],"prefix":"10.1109","author":[{"given":"A.","family":"Floridia","sequence":"first","affiliation":[]},{"given":"D.","family":"Piumatti","sequence":"additional","affiliation":[]},{"given":"E.","family":"Sanchez","sequence":"additional","affiliation":[]},{"given":"S.","family":"De Luca","sequence":"additional","affiliation":[]},{"given":"A.","family":"Sansonetti","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2001.915006"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1980.1675602"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/DFT.2013.6653581"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/2593069.2602971"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2004.839486(410) 24"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2011.5763092"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2014.2356612"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ETS.2012.6233004"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2009.34"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2009.118"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2010.5699277"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ETS.2009.31"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2015.2498546"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2010.5"},{"key":"ref2","doi-asserted-by":"crossref","first-page":"79","DOI":"10.1109\/2.612253","article-title":"A single-chip multiprocessor","volume":"30","author":"hammond","year":"1997","journal-title":"Computer"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2005.10"},{"journal-title":"PowerPC Embedded Application Binary Interface (EABI) 32-Bit Implementation","year":"2004","author":"sobek","key":"ref9"}],"event":{"name":"2018 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS)","start":{"date-parts":[[2018,4,9]]},"location":"Taormina","end":{"date-parts":[[2018,4,12]]}},"container-title":["2018 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8362838\/8368541\/08368558.pdf?arnumber=8368558","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,26]],"date-time":"2022-01-26T00:35:52Z","timestamp":1643157352000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8368558\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,4]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/dtis.2018.8368558","relation":{},"subject":[],"published":{"date-parts":[[2018,4]]}}}