{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,24]],"date-time":"2025-10-24T16:44:46Z","timestamp":1761324286462,"version":"3.28.0"},"reference-count":30,"publisher":"IEEE","license":[{"start":{"date-parts":[[2020,4,1]],"date-time":"2020-04-01T00:00:00Z","timestamp":1585699200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,4,1]],"date-time":"2020-04-01T00:00:00Z","timestamp":1585699200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,4,1]],"date-time":"2020-04-01T00:00:00Z","timestamp":1585699200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020,4]]},"DOI":"10.1109\/dtis48698.2020.9080961","type":"proceedings-article","created":{"date-parts":[[2020,5,1]],"date-time":"2020-05-01T01:02:13Z","timestamp":1588294933000},"page":"1-6","source":"Crossref","is-referenced-by-count":17,"title":["A Microprocessor Protection Architecture against Hardware Trojans in Memories"],"prefix":"10.1109","author":[{"given":"Alperen","family":"Bolat","sequence":"first","affiliation":[]},{"given":"Luca","family":"Cassano","sequence":"additional","affiliation":[]},{"given":"Pedro","family":"Reviriego","sequence":"additional","affiliation":[]},{"given":"Oguz","family":"Ergin","sequence":"additional","affiliation":[]},{"given":"Marco","family":"Ottavi","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref30","first-page":"1","article-title":"Open-source risc-v processor ip cores for fpgas overview and evaluation","author":"hller","year":"2019","journal-title":"2019 8th Mediterranean Conference on Embedded Computing (MECO)"},{"key":"ref10","article-title":"Stealthy dopant-level hardware trojans","author":"becker","year":"2013","journal-title":"Cryptographic Hardware and Embedded Systems"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2012.6378629"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TETC.2013.2287186"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/DFT.2012.6378199"},{"year":"0","key":"ref14"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ICAM.2017.8242145"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2422836"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ICASID.2017.8285773"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/DFT.2013.6653605"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TIFS.2011.2164908"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/DFT.2017.8244458"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2017.7928946"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2012.56"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4419-8080-9"},{"journal-title":"Method and system for secure exchange of ip cores","year":"2010","author":"donlin","key":"ref6"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2017.2654506"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2014.2332291"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2011.5954998"},{"key":"ref7","article-title":"A survey of hardware trojan taxonomy and detection","volume":"27","author":"tehranipoor","year":"2010","journal-title":"IEEE Design & Test of Computers"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2013.6691207"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2008.4559052"},{"journal-title":"Trends in the Global IC Design Service Market","year":"0","key":"ref1"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/3299874.3317983"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TIFS.2017.2658544"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/HPEC.2015.7322483"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2009.5224959"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ETS.2013.6569378"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/362686.362692"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2018.8368630"}],"event":{"name":"2020 15th Design & Technology of Integrated Systems in Nanoscale Era (DTIS)","start":{"date-parts":[[2020,4,1]]},"location":"Marrakech, Morocco","end":{"date-parts":[[2020,4,3]]}},"container-title":["2020 15th Design & Technology of Integrated Systems in Nanoscale Era (DTIS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9076568\/9080912\/09080961.pdf?arnumber=9080961","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,6,27]],"date-time":"2022-06-27T15:49:39Z","timestamp":1656344979000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9080961\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,4]]},"references-count":30,"URL":"https:\/\/doi.org\/10.1109\/dtis48698.2020.9080961","relation":{},"subject":[],"published":{"date-parts":[[2020,4]]}}}