{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,7]],"date-time":"2026-01-07T07:55:03Z","timestamp":1767772503129},"reference-count":17,"publisher":"IEEE","license":[{"start":{"date-parts":[[2020,4,1]],"date-time":"2020-04-01T00:00:00Z","timestamp":1585699200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,4,1]],"date-time":"2020-04-01T00:00:00Z","timestamp":1585699200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,4,1]],"date-time":"2020-04-01T00:00:00Z","timestamp":1585699200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020,4]]},"DOI":"10.1109\/dtis48698.2020.9081268","type":"proceedings-article","created":{"date-parts":[[2020,5,1]],"date-time":"2020-05-01T01:02:13Z","timestamp":1588294933000},"page":"1-2","source":"Crossref","is-referenced-by-count":5,"title":["Exploiting Approximate Computing for implementing Low Cost Fault Tolerance Mechanisms"],"prefix":"10.1109","author":[{"given":"A.","family":"Bosio","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"I.","family":"O'Connor","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"G. S.","family":"Rodrigues","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"F. K.","family":"Lima","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"S.","family":"Hamdioui","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2019.06.077"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ETS.2013.6569370"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/LATW.2017.7906764"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/LATW.2018.8349675"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-78890-6_52"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/IOLTS.2018.8474122"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2015.06.125"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/DCIS.2018.8681499"},{"key":"ref4","first-page":"1718","article-title":"Memristor based computation-in-memory architecture for data-intensive applications","author":"hamdioui","year":"2015","journal-title":"2015 Design Automation Test in Europe Conference Exhibition (DATE)"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/DFT.2019.8875270"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1038\/nature16961"},{"key":"ref5","first-page":"722","article-title":"Memristor for Computing: Myth or Reality?","author":"hamdioui","year":"2017","journal-title":"Proc Conf Des Autom Test Eur"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1007\/s10836-018-5734-9"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/MDAT.2015.2505723"},{"key":"ref2","article-title":"Future of computer architecture","author":"patterson","year":"2006","journal-title":"Berkeley EECS Annual Research Symposium (BEARS)"},{"key":"ref1","doi-asserted-by":"crossref","DOI":"10.1007\/978-3-642-23096-7","article-title":"Chips 2020","author":"hoefflinger","year":"2012","journal-title":"The Frontiers Collection"},{"key":"ref9","first-page":"45","author":"rehman","year":"2019","journal-title":"Heterogeneous Approximate Multipliers Architectures and Design Methodologies"}],"event":{"name":"2020 15th Design & Technology of Integrated Systems in Nanoscale Era (DTIS)","start":{"date-parts":[[2020,4,1]]},"location":"Marrakech, Morocco","end":{"date-parts":[[2020,4,3]]}},"container-title":["2020 15th Design & Technology of Integrated Systems in Nanoscale Era (DTIS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9076568\/9080912\/09081268.pdf?arnumber=9081268","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,6,27]],"date-time":"2022-06-27T15:51:05Z","timestamp":1656345065000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9081268\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,4]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/dtis48698.2020.9081268","relation":{},"subject":[],"published":{"date-parts":[[2020,4]]}}}