{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,29]],"date-time":"2024-10-29T15:33:15Z","timestamp":1730215995923,"version":"3.28.0"},"reference-count":9,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2007,8]]},"DOI":"10.1109\/ecctd.2007.4529521","type":"proceedings-article","created":{"date-parts":[[2008,5,29]],"date-time":"2008-05-29T13:43:50Z","timestamp":1212068630000},"page":"1-4","source":"Crossref","is-referenced-by-count":11,"title":["A low-power CMOS analog voltage buffer using compact adaptive biasing"],"prefix":"10.1109","author":[{"given":"Chutham","family":"Sawigun","sequence":"first","affiliation":[]},{"given":"Jirayuth","family":"Mahattanakul","sequence":"additional","affiliation":[]},{"given":"Andreas","family":"Demosthenous","sequence":"additional","affiliation":[]},{"given":"Dipankar","family":"Pal","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.811954"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1049\/ecej:19970404"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/TCT.1970.1083067"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1049\/el:20045047"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1049\/el:20020952"},{"key":"5","first-page":"448","article-title":"a low voltage rail to rail class-ab input\/output op-amp with slew rate and settling enhancement","author":"lin","year":"1998","journal-title":"IEEE ISCAS"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1078\/1434-8411-54100109"},{"key":"9","first-page":"1276","article-title":"the flipped volltage follower: a useful cell for low-voltage low-power circuit design","volume":"52","author":"cavarjal","year":"2007","journal-title":"IEEE Trans Circuits Syst I Regular Papers"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/4.735528"}],"event":{"name":"2007 European Conference on Circuit Theory and Design (ECCTD 2007)","start":{"date-parts":[[2007,8,27]]},"location":"Sevilla, Spain","end":{"date-parts":[[2007,8,30]]}},"container-title":["2007 18th European Conference on Circuit Theory and Design"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4520033\/4529518\/04529521.pdf?arnumber=4529521","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,16]],"date-time":"2017-03-16T11:20:25Z","timestamp":1489663225000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4529521\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2007,8]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1109\/ecctd.2007.4529521","relation":{},"subject":[],"published":{"date-parts":[[2007,8]]}}}