{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,18]],"date-time":"2025-12-18T13:49:39Z","timestamp":1766065779067},"reference-count":17,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2007,8]]},"DOI":"10.1109\/ecctd.2007.4529649","type":"proceedings-article","created":{"date-parts":[[2008,5,29]],"date-time":"2008-05-29T17:43:50Z","timestamp":1212083030000},"page":"527-530","source":"Crossref","is-referenced-by-count":12,"title":["A rail-to-rail DC-enhanced adaptive biased fully differential OTA"],"prefix":"10.1109","author":[{"given":"Giuseppe","family":"Ferri","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Vincenzo","family":"Stornelli","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Andrea","family":"De Marcellis","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Angelo","family":"Celeste","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"17","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.808326"},{"journal-title":"Design of Analog Integrated Circuits and Systems","year":"1994","author":"laker","key":"15"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1109\/4.748185"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2002.1012835"},{"key":"14","doi-asserted-by":"crossref","DOI":"10.1109\/MWSCAS.2000.951693","article-title":"a negative conductance voltage gain enhancement technique for low voltage high speed cmos op amp design","author":"yan","year":"2000","journal-title":"Proc 2000 IEEE Midwest Symp Circuits and Systems"},{"key":"11","article-title":"a low-voltage cmos rail-to-rail class ab inputoutput op-amp with slew rate and settling enhancement","author":"lin","year":"1998","journal-title":"Proc ISCAS"},{"key":"12","first-page":"13","article-title":"a low-voltage low-power rail-torail constant-gm adaptive biased cmos operational amplifier","author":"cardarilli","year":"1998","journal-title":"Proc ICM conference"},{"journal-title":"Low voltage low power CMOS current conveyors","year":"2003","author":"ferri","key":"3"},{"journal-title":"Power trade-offs and lowpower in analog CMOS ICs","year":"2002","author":"sanduleanu","key":"2"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4615-2283-6"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/4.839923"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1982.1051769"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/4.32035"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1049\/el:20040191"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4757-2489-9"},{"key":"9","article-title":"a 1.6v 80w rail-to-rail constant-gm bipolar adaptive biased op-amp input stage","author":"ferri","year":"1998","journal-title":"Proc ISCAS"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/4.90102"}],"event":{"name":"2007 18th European Conference on Circuit Theory and Design (ECCTD '07)","start":{"date-parts":[[2007,8,27]]},"location":"Seville","end":{"date-parts":[[2007,8,30]]}},"container-title":["2007 18th European Conference on Circuit Theory and Design"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4520033\/4529518\/04529649.pdf?arnumber=4529649","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,3,29]],"date-time":"2019-03-29T07:51:06Z","timestamp":1553845866000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/4529649\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2007,8]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/ecctd.2007.4529649","relation":{},"subject":[],"published":{"date-parts":[[2007,8]]}}}