{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,28]],"date-time":"2026-02-28T14:57:16Z","timestamp":1772290636957,"version":"3.50.1"},"reference-count":20,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,8]]},"DOI":"10.1109\/ecctd.2015.7300128","type":"proceedings-article","created":{"date-parts":[[2015,10,20]],"date-time":"2015-10-20T07:49:49Z","timestamp":1445327389000},"page":"1-4","source":"Crossref","is-referenced-by-count":7,"title":["A survey about testing asynchronous circuits"],"prefix":"10.1109","author":[{"given":"Steffen","family":"Zeidler","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Milos","family":"Krstic","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/IOLTS.2010.5560190"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/GLSV.1995.516057"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1996.556965"},{"key":"ref13","first-page":"804","article-title":"Au-tomatic Scan Insertion and Test Generation for Asynchronous Circuits","author":"te beest","year":"0","journal-title":"International Test Conference 2002 (ITC'02)"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/VTEST.1995.512650"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.2000.836798"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/DSD.2005.22"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4757-3385-3"},{"key":"ref18","article-title":"Testing Asynchronous Circuits","author":"kermani","year":"2001"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2005.203"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ETS.2006.31"},{"key":"ref3","first-page":"118","article-title":"Testing Delay-Insensitive Circuits","author":"martin","year":"1991","journal-title":"Proceedings of the University of California\/Santa Cruz conference on Advanced research in VLSI"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1016\/0167-9260(95)00012-5"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.1994.656316"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.1997.643619"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/VTEST.1995.512652"},{"key":"ref2","author":"abramovici","year":"1990","journal-title":"Digital Systems Testing and Testable Design IEEE Press"},{"key":"ref1","article-title":"International Technology Roadmap for Semiconductors 2012 - Design","year":"2012","journal-title":"Semiconductors Industries Association Report"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2004.1386968"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2011.17"}],"event":{"name":"2015 European Conference on Circuit Theory and Design (ECCTD)","location":"Trondheim, Norway","start":{"date-parts":[[2015,8,24]]},"end":{"date-parts":[[2015,8,26]]}},"container-title":["2015 European Conference on Circuit Theory and Design (ECCTD)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7287453\/7299995\/07300128.pdf?arnumber=7300128","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,25]],"date-time":"2017-03-25T01:00:03Z","timestamp":1490403603000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7300128\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,8]]},"references-count":20,"URL":"https:\/\/doi.org\/10.1109\/ecctd.2015.7300128","relation":{},"subject":[],"published":{"date-parts":[[2015,8]]}}}