{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,15]],"date-time":"2025-08-15T02:21:32Z","timestamp":1755224492768,"version":"3.43.0"},"reference-count":8,"publisher":"IEEE","license":[{"start":{"date-parts":[[2017,9,1]],"date-time":"2017-09-01T00:00:00Z","timestamp":1504224000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2017,9,1]],"date-time":"2017-09-01T00:00:00Z","timestamp":1504224000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017,9]]},"DOI":"10.1109\/ecctd.2017.8093233","type":"proceedings-article","created":{"date-parts":[[2017,11,22]],"date-time":"2017-11-22T12:46:56Z","timestamp":1511354816000},"page":"1-4","source":"Crossref","is-referenced-by-count":3,"title":["Integrated mixed mode neural network implementation"],"prefix":"10.1109","author":[{"given":"J. A.","family":"Mart\u00ednez-Nieto","sequence":"first","affiliation":[{"name":"Electronics Department Instituto Nacional de Astrof&#x00ED;sica, &#x00D3;ptica y Electr&#x00F3;nica (INAOE), Tonantzintla, Puebla, Mexico"}]},{"given":"M. T.","family":"Sanz-Pascual","sequence":"additional","affiliation":[{"name":"Electronics Department Instituto Nacional de Astrof&#x00ED;sica, &#x00D3;ptica y Electr&#x00F3;nica (INAOE), Tonantzintla, Puebla, Mexico"}]},{"given":"N. J.","family":"Medrano-Marqu\u00e9s","sequence":"additional","affiliation":[{"name":"Group of Electronic Design (GDE), University of Zaragoza, Zaragoza, Spain"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2016.2615306"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4757-2890-3"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1016\/j.proeng.2016.11.491"},{"key":"ref5","doi-asserted-by":"crossref","first-page":"661","DOI":"10.1109\/TNNLS.2015.2434847","article-title":"Analog Programmable Distance Calculation Circuit for Winner Takes All Neural Network Realized in the CMOS Technology","volume":"27","author":"tala?ka","year":"2016","journal-title":"IEEE Transactions on Neural Networks and Learning Systems"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1049\/el:20082419"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1002\/cta.450"},{"key":"ref2","first-page":"3652","volume":"9","author":"zatorre","year":"2009","journal-title":"Digitally Programmable Analogue Circuits for Sensor Conditioning Systems"},{"key":"ref1","first-page":"12","volume":"53","author":"bourzac","year":"2016","journal-title":"Neural Networks on the Go IEEE Spectrum"}],"event":{"name":"2017 European Conference on Circuit Theory and Design (ECCTD)","start":{"date-parts":[[2017,9,4]]},"location":"Catania, Italy","end":{"date-parts":[[2017,9,6]]}},"container-title":["2017 European Conference on Circuit Theory and Design (ECCTD)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8080320\/8093219\/08093233.pdf?arnumber=8093233","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,8,12]],"date-time":"2025-08-12T17:55:13Z","timestamp":1755021313000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8093233\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,9]]},"references-count":8,"URL":"https:\/\/doi.org\/10.1109\/ecctd.2017.8093233","relation":{},"subject":[],"published":{"date-parts":[[2017,9]]}}}