{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,7]],"date-time":"2024-09-07T05:32:11Z","timestamp":1725687131137},"reference-count":10,"publisher":"IEEE","license":[{"start":{"date-parts":[[2023,5,18]],"date-time":"2023-05-18T00:00:00Z","timestamp":1684368000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,5,18]],"date-time":"2023-05-18T00:00:00Z","timestamp":1684368000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023,5,18]]},"DOI":"10.1109\/eit57321.2023.10187330","type":"proceedings-article","created":{"date-parts":[[2023,7,25]],"date-time":"2023-07-25T17:22:40Z","timestamp":1690305760000},"page":"452-457","source":"Crossref","is-referenced-by-count":1,"title":["Speed-Optimized Implementation of Fast Chirplet Decomposition Algorithm on FPGA-SoC"],"prefix":"10.1109","author":[{"given":"Austin","family":"Fite","sequence":"first","affiliation":[{"name":"Illinois Institute of Technology,ECASP Research Laboratory,Department of Electrical and Computer Engineering,Chicago,IL,U.S.A."}]},{"given":"Mikhail","family":"Gromov","sequence":"additional","affiliation":[{"name":"Illinois Institute of Technology,ECASP Research Laboratory,Department of Electrical and Computer Engineering,Chicago,IL,U.S.A."}]},{"given":"Tianyang","family":"Fang","sequence":"additional","affiliation":[{"name":"Illinois Institute of Technology,ECASP Research Laboratory,Department of Electrical and Computer Engineering,Chicago,IL,U.S.A."}]},{"given":"Jafar","family":"Saniie","sequence":"additional","affiliation":[{"name":"Illinois Institute of Technology,ECASP Research Laboratory,Department of Electrical and Computer Engineering,Chicago,IL,U.S.A."}]}],"member":"263","reference":[{"key":"ref8","article-title":"The Chirplet Transform: A Generalization of Gabor's Logon Transform","author":"mann","year":"2002","journal-title":"Vision Interface"},{"journal-title":"Multiply Your Sampling Rate with Time-Interleaved Data Converters","article-title":"Multiply your sampling rate with time-interleaved data converters","year":"2001","key":"ref7"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/EECCIS54468.2022.9902922"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/EUROCON.2019.8861860"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/29.61538"},{"journal-title":"Mixed-Signal and DSP Design Techniques Engineering Staff of Analog Devices Inc printed by Analog Devices","year":"2000","key":"ref6"},{"year":"0","key":"ref5"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ANTS47819.2019.9118076"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/LSP.2008.2001816"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TUFFC.2006.152"}],"event":{"name":"2023 IEEE International Conference on Electro Information Technology (eIT)","start":{"date-parts":[[2023,5,18]]},"location":"Romeoville, IL, USA","end":{"date-parts":[[2023,5,20]]}},"container-title":["2023 IEEE International Conference on Electro Information Technology (eIT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10187212\/10187216\/10187330.pdf?arnumber=10187330","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,8,14]],"date-time":"2023-08-14T17:38:10Z","timestamp":1692034690000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10187330\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,5,18]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/eit57321.2023.10187330","relation":{},"subject":[],"published":{"date-parts":[[2023,5,18]]}}}