{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T08:35:33Z","timestamp":1725438933517},"reference-count":8,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,9]]},"DOI":"10.1109\/esscirc.2016.7598244","type":"proceedings-article","created":{"date-parts":[[2016,10,20]],"date-time":"2016-10-20T21:07:39Z","timestamp":1476997659000},"page":"67-70","source":"Crossref","is-referenced-by-count":0,"title":["Heterogeneously integrated program voltage generator for 1.0V operation NAND flash with best mix & match of standard CMOS process and NAND flash process"],"prefix":"10.1109","author":[{"given":"Masahiro","family":"Tanaka","sequence":"first","affiliation":[]},{"given":"Kota","family":"Tsurumi","sequence":"additional","affiliation":[]},{"given":"Tomoya","family":"Ishii","sequence":"additional","affiliation":[]},{"given":"Ken","family":"Takeuchi","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2131810"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2012.6242497"},{"key":"ref6","first-page":"1200","article-title":"A 1.0 V Operation, 65% Faster Set\/Reset Voltage (3V) Generator for 3D-integrated ReRAM and NAND flash Hybrid Solid-State Drive","author":"tanaka","year":"2015","journal-title":"International Conference on Solid State Devices and Material"},{"key":"ref5","first-page":"309","article-title":"$V_{\\text{SET}\/\\text{RESET}}$ and $V_{\\text{PGM}}$ generator without boosting dead time for 3D-ReRAM and NAND flash hybrid solid-state drives","author":"hatanaka","year":"2012","journal-title":"IEEE Asian Solid State Circuits Conference"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.872704"},{"key":"ref7","first-page":"1","article-title":"0.6V Operation, 26% Smaller Voltage Ripple, 9% Energy Efficient Boost Converter with Adaptively Optimized Comparator Bias-Current for ReRAM Program in Low Power IoT Embedded Applications","author":"ishii","year":"2015","journal-title":"IEEE Asian Solid State Circuits Conference"},{"year":"0","key":"ref2"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSNIP.2015.7106913"}],"event":{"name":"ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference","start":{"date-parts":[[2016,9,12]]},"location":"Lausanne, Switzerland","end":{"date-parts":[[2016,9,15]]}},"container-title":["ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7585490\/7598228\/07598244.pdf?arnumber=7598244","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2016,11,16]],"date-time":"2016-11-16T14:39:53Z","timestamp":1479307193000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7598244\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,9]]},"references-count":8,"URL":"https:\/\/doi.org\/10.1109\/esscirc.2016.7598244","relation":{},"subject":[],"published":{"date-parts":[[2016,9]]}}}