{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,7,24]],"date-time":"2025-07-24T11:10:17Z","timestamp":1753355417984},"reference-count":11,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,9]]},"DOI":"10.1109\/esscirc.2016.7598268","type":"proceedings-article","created":{"date-parts":[[2016,10,20]],"date-time":"2016-10-20T21:07:39Z","timestamp":1476997659000},"source":"Crossref","is-referenced-by-count":3,"title":["A 0.065mm<sup>2<\/sup> 19.8mW single channel calibration-free 12b 600MS\/s ADC in 28nm UTBB FDSOI using FBB"],"prefix":"10.1109","author":[{"given":"Ashish","family":"Kumar","sequence":"first","affiliation":[]},{"given":"Chandrajit","family":"Debnath","sequence":"additional","affiliation":[]},{"given":"Pratap Narayan","family":"Singh","sequence":"additional","affiliation":[]},{"given":"Vivek","family":"Bhatia","sequence":"additional","affiliation":[]},{"given":"Shivani","family":"Chaudhary","sequence":"additional","affiliation":[]},{"given":"Vigyan","family":"Jain","sequence":"additional","affiliation":[]},{"given":"Stephane","family":"Le Tual","sequence":"additional","affiliation":[]},{"given":"Rakesh","family":"Malik","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2014.6757401"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2012.6177090"},{"key":"ref10","author":"ali","year":"2010","journal-title":"A 16-bit 250-MS\/s IF Sampling Pipelined ADC With Background Calibration"},{"key":"ref6","first-page":"386","article-title":"A 10 b 100 MS\/s 1.13 mW SAR ADC with binary-scaled error compensation","author":"liu","year":"0"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2015.7063126"},{"key":"ref5","first-page":"98c","article-title":"A 12-bit, 200-MS\/s, 11.5-mW Pipeline ADC using a Pulsed Bucket Brigade Front-End","author":"dolev","year":"2013","journal-title":"Symp VLSI Circuits"},{"key":"ref8","author":"le tual","year":"2010","journal-title":"Differential Successive Approximation Analog to Digital Converter"},{"key":"ref7","first-page":"268c","article-title":"A 2.1 mW 11b 410 MS\/s dynamic pipelined SAR ADC with background calibration in 28nm digital CMOS","author":"verbruggen","year":"2013","journal-title":"VLSI circuits"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2015.7063036"},{"key":"ref9","article-title":"A 5GS\/s 150mW 10b SHALess Pipelined\/SAR Hybrid ADC in 28nm CMOS","author":"brandolini","year":"0","journal-title":"ISSCC 2015"},{"key":"ref1","author":"chiang","year":"2014","journal-title":"A 10-Bit 800-MHz 19-mW CMOS ADC"}],"event":{"name":"ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference","location":"Lausanne, Switzerland","start":{"date-parts":[[2016,9,12]]},"end":{"date-parts":[[2016,9,15]]}},"container-title":["ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7585490\/7598228\/07598268.pdf?arnumber=7598268","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2016,11,16]],"date-time":"2016-11-16T14:19:24Z","timestamp":1479305964000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7598268\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,9]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/esscirc.2016.7598268","relation":{},"subject":[],"published":{"date-parts":[[2016,9]]}}}