{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T07:29:11Z","timestamp":1725607751478},"reference-count":11,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,9]]},"DOI":"10.1109\/esscirc.2016.7598270","type":"proceedings-article","created":{"date-parts":[[2016,10,20]],"date-time":"2016-10-20T17:07:39Z","timestamp":1476983259000},"page":"173-176","source":"Crossref","is-referenced-by-count":3,"title":["A 12 bit, 2-MS\/s, 0.016-mm<sup>2<\/sup> column-parallel readout cyclic ADC, having 50% reduced slew rate requirement due to feed-forward spike eliminator"],"prefix":"10.1109","author":[{"given":"Saikrishna","family":"Ganta","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Alfredo","family":"Tomasini","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ajay","family":"Taparia","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Taehee","family":"Cho","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mandar","family":"Kulkarni","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ozan","family":"Erdogan","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2336800"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.858477"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2008.920123"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/4.494191"},{"key":"ref11","first-page":"72","article-title":"A 1.2V 30mW 8b 800MS\/s time-interleaved ADC in 65nm CMOS","author":"tu","year":"2008","journal-title":"IEEE Symposium on VLSI Circuits"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2013761"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/4.261994"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2024819"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.891655"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2008.4672080"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2144010"}],"event":{"name":"ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference","start":{"date-parts":[[2016,9,12]]},"location":"Lausanne, Switzerland","end":{"date-parts":[[2016,9,15]]}},"container-title":["ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7585490\/7598228\/07598270.pdf?arnumber=7598270","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,8,17]],"date-time":"2021-08-17T18:23:36Z","timestamp":1629224616000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/7598270\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,9]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/esscirc.2016.7598270","relation":{},"subject":[],"published":{"date-parts":[[2016,9]]}}}