{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,17]],"date-time":"2025-10-17T13:57:42Z","timestamp":1760709462727},"reference-count":9,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017,9]]},"DOI":"10.1109\/esscirc.2017.8094552","type":"proceedings-article","created":{"date-parts":[[2017,11,28]],"date-time":"2017-11-28T16:03:53Z","timestamp":1511885033000},"page":"167-170","source":"Crossref","is-referenced-by-count":9,"title":["A 36.4dB SNDR @ 5GHz 1.25GS\/s 7b 3.56mW single-channel SAR ADC in 28nm bulk CMOS"],"prefix":"10.1109","author":[{"given":"Athanasios","family":"Ramkaj","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Maarten","family":"Strackx","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Michiel","family":"Steyaert","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Filip","family":"Tavernier","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","first-page":"466","article-title":"A 5.5mW 6b 5GS\/s 4x-interleaved 3b\/cycle SAR ADC in 65nm CMOS","author":"chan","year":"2015","journal-title":"ISSCC Dig Tech Papers"},{"key":"ref3","first-page":"382","article-title":"A 20GHz-BW 6b 10GS\/s 32mW Time-Interleaved SAR ADC with Master T&H in 28nm UTBB FDSOI Technology","author":"le tual","year":"2014","journal-title":"ISSCC Dig Tech Papers"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2016.7418106"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2011.5746272"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/4.760369"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/PRIME.2015.7251337"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2013.6487818"},{"journal-title":"ADC Performance Survey 1997&#x2013;2013","year":"0","author":"murmann","key":"ref9"},{"key":"ref1","first-page":"188","article-title":"A 0.024mm2 8b 400MS\/s SAR ADC with 2b\/cycle and Resistive DAC in 65nm CMOS","author":"wei","year":"2011","journal-title":"ISSCC Dig Tech Papers"}],"event":{"name":"ESSCIRC 2017 - 43rd IEEE European Solid-State Circuits Conference","start":{"date-parts":[[2017,9,11]]},"location":"Leuven","end":{"date-parts":[[2017,9,14]]}},"container-title":["ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8061155\/8094509\/08094552.pdf?arnumber=8094552","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,12,13]],"date-time":"2017-12-13T19:21:33Z","timestamp":1513192893000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8094552\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,9]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1109\/esscirc.2017.8094552","relation":{},"subject":[],"published":{"date-parts":[[2017,9]]}}}