{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,7]],"date-time":"2024-09-07T10:52:52Z","timestamp":1725706372585},"reference-count":10,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017,9]]},"DOI":"10.1109\/esscirc.2017.8094592","type":"proceedings-article","created":{"date-parts":[[2017,11,28]],"date-time":"2017-11-28T16:03:53Z","timestamp":1511885033000},"page":"328-331","source":"Crossref","is-referenced-by-count":2,"title":["A low voltage 0.8V RF receiver in 28nm CMOS for 5GHz WLAN"],"prefix":"10.1109","author":[{"given":"Atsushi","family":"Shirane","sequence":"first","affiliation":[]},{"given":"Shusuke","family":"Kawai","sequence":"additional","affiliation":[]},{"given":"Hiromitsu","family":"Aoyama","sequence":"additional","affiliation":[]},{"given":"Rui","family":"Ito","sequence":"additional","affiliation":[]},{"given":"Toshiya","family":"Mitomo","sequence":"additional","affiliation":[]},{"given":"Hiroyuki","family":"Kobayashi","sequence":"additional","affiliation":[]},{"given":"Hiroshi","family":"Yoshida","sequence":"additional","affiliation":[]},{"given":"Hideaki","family":"Majima","sequence":"additional","affiliation":[]},{"given":"Ryuichi","family":"Fujimoto","sequence":"additional","affiliation":[]},{"given":"Hiroshi","family":"Tsurumi","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","first-page":"1","article-title":"A 28nm CMOS digital fractional-N PLL with ?245.5dB FOM and a frequency tripler for 802.11abgn\/ac radio","author":"gao","year":"2015","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref3","first-page":"62","article-title":"32nm x86 OS-compliant PC on-chip with dualcore Atom&#x00AE; processor and RF WiFi transceiver","author":"lakdawala","year":"2012","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.862339"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2015.2412953"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2144090"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1049\/el:19950207"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2003.1234236"},{"key":"ref2","first-page":"170","article-title":"A 2&#x00D7;2 WLAN and Bluetooth combo SoC in 28nm CMOS with on-chip WLAN digital power amplifier, integrated 2G\/BT SP3T switch and BT pulling cancelation","author":"winoto","year":"2016","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2386900"},{"journal-title":"IEEE International Roadmap for Devices and Systems (IRDS)","article-title":"IRDS","year":"2017","key":"ref1"}],"event":{"name":"ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference (ESSCIRC)","start":{"date-parts":[[2017,9,11]]},"location":"Leuven, Belgium","end":{"date-parts":[[2017,9,14]]}},"container-title":["ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8061155\/8094509\/08094592.pdf?arnumber=8094592","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,11,30]],"date-time":"2017-11-30T19:52:42Z","timestamp":1512071562000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8094592\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,9]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/esscirc.2017.8094592","relation":{},"subject":[],"published":{"date-parts":[[2017,9]]}}}