{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,1]],"date-time":"2026-05-01T16:01:17Z","timestamp":1777651277342,"version":"3.51.4"},"reference-count":10,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,9]]},"DOI":"10.1109\/esscirc.2018.8494273","type":"proceedings-article","created":{"date-parts":[[2018,12,7]],"date-time":"2018-12-07T21:18:18Z","timestamp":1544217498000},"page":"154-157","source":"Crossref","is-referenced-by-count":7,"title":["A 0.78-\u00b5W 96-Ch. Deep Sub-Vt Neural Spike Processor Integrated with a Nanowatt Power Management Unit"],"prefix":"10.1109","author":[{"given":"Jiangyi","family":"Li","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Pavan K.","family":"Chundi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sung","family":"Kim","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Zhewei","family":"Jiang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Minhao","family":"Yang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Joonseong","family":"Kang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Seungchul","family":"Jung","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sang Joon","family":"Kim","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mingoo","family":"Seok","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2715827"},{"key":"ref3","article-title":"A 128-Channel Spike Sorting Processor Featuring 0.175 µW and 0.0033 mm2 per channel in 65-nm CMOS","author":"zeinolabedin","year":"2016","journal-title":"VLSIC"},{"key":"ref10","article-title":"13% Power Reduction in 16 b Integer Unit in 40 nm CMOS by Adaptive Power Supply Voltage Control with Parity-Based Error Prediction and Detection (PEPD) and Fully Integrated Digital LDO","author":"hirairi","year":"2012","journal-title":"ISSCC"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2111230"},{"key":"ref5","article-title":"Ultra-Low-Power and Robust Power-Management\/Microprocessor System Using Digital Error-based Regulation","author":"kim","year":"2017","journal-title":"ESSCIRC"},{"key":"ref8","article-title":"A 60%-Efficiency 20nW-500µW Tri-Output Fully Integrated Power Management Unit with Environmental Adaptation and Load-Proportional Biasing for IoT Systems","author":"jung","year":"2016","journal-title":"ISSCC"},{"key":"ref7","article-title":"Enabling Wide Autonomous DVFS in a 22 nm Graphics Execution Core Using a Digitally Controlled Hybrid LDO\/Switched-Capacitor VR with Fast Droop Mitigation","author":"kim","year":"2015","journal-title":"ISSCC"},{"key":"ref2","article-title":"1.74-µW\/ch, 95.3%-accurate Spike-Sorting Hardware based on Bayesian Decision","author":"jiang","year":"2016","journal-title":"VLSIC"},{"key":"ref9","article-title":"A 450 mV timing-margin-free waveform sorter based on body swapping error correction","author":"kim","year":"2016","journal-title":"VLSIC"},{"key":"ref1","article-title":"Microwatt End-to-End Digital Neural Signal Processing Systems for Motor Intention Decoding","author":"jiang","year":"2017","journal-title":"DATE"}],"event":{"name":"ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC)","location":"Dresden","start":{"date-parts":[[2018,9,3]]},"end":{"date-parts":[[2018,9,6]]}},"container-title":["ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8476980\/8494227\/08494273.pdf?arnumber=8494273","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,8,24]],"date-time":"2020-08-24T01:35:43Z","timestamp":1598232943000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8494273\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,9]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/esscirc.2018.8494273","relation":{},"subject":[],"published":{"date-parts":[[2018,9]]}}}